ADC12DJ3200: IBIS model question

Hi Lacey

The standard IBIS model provides information about the logic I/O to facilitate board level modeling of those logic interfaces.

The IBIS-AMI model provides information about the high speed serial data outputs to facilitate board level modeling of those interfaces.

The input insertion loss flatness was characterized using a signal generator, that is shown in the figure on the front page of the ADC12DJ3200 datasheet.

We also have a preliminary s-parameter model for the analog inputs that can be used for board level simulations:

https://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/73/PG1p0_5F00_TRMcalibration_5F00_ADCSdd11_5F00_031716.s2p

We are not completely satisfied with the accuracy of the fixture de-embedding at higher frequencies, but this is the best we have at this time.

I hope this is helpful.

Best regards,

Jim B

Hi Lacey
The input bandwidth measurements were done using a bench characterization board which has an RF connector for each + and - input. A high quality signal generator, laboratory quality balun and high quality cables were used to drive the board differential inputs. The loss through the cables and balun was quantified using a high frequency oscilloscope and those measurements were used to correct the measured data gathered with the ADC.
The generator is set at a constant power and the frequency is stepped. At each frequency point the converted signal amplitude is logged. The loss through the cables and balun at that same frequency is also logged in a separate frequency sweep. The two sets of data are combined to determine the actual input attenuation versus frequency for the ADC itself.
An additional correction is done for the attenuation of the circuit board material versus frequency for the input signal paths on the bench board.
I hope this is helpful.
Best regards,
Jim B

Hi Lacey
Sorry for the delayed response.
Testing used a bench characterization board that uses a different data capture method. The TSW14J5X capture boards and High Speed Data Converter Pro software are not used for this setup.
The signal power arriving at the ADC was calculated using an FFT of the ADC 12-bit data.
I don't have access to the raw data used to generate the plot.
I think the model could be created in terms of insertion loss as a function of frequency.
Can I ask how the customer wants to use this model?
Are they trying to make a simple behavioral model of the whole system?
What simulation tool is being used?
I hope this is helpful.
Best regards,
Jim B