DAC8551: /DAC8811/DAC161S055: Maximum frequency of output signal?

Anthony,

A "clean" 50kHz signal is a pretty open-ended criteria to make this decision on, perhaps if that can be quantified in a more conventional specification like THD or SNR we can be more helpful.

Generally speaking our devices are aimed at DC applications, which is going to make it difficult to really specify performance based on datasheet figures.

The main challenge we often face is delivering enough samples to accurately represent an AC waveform, especially in these frequencies that are between "Precision DAC" and "High Speed DAC" bandwidths. At 50kHz for instance our fastest unbuffered R-2R DACs would only hit 20 samples or so per period while the more conventional devices with ~10us update rates would really only be generating a triangle wave based purely on our settling time specifications.

Keeping in mind that our settling time definitions usually are to some error band smaller than or equivalent to 1 LSB, which may not be necessary for an AC application - so we'd perhaps instead be mainly looking at slew rate capabilities instead. Again as we're not really aiming to land in AC applications it's hard to say what performance would look like if one were to make this decision.

The other item to consider will be the output glitch and digital feed-through of the device. Both will contribute code-specific anomalies at the DAC output which will be detrimental for THD / SNR. To that end R-2R and MDACs tend to have larger glitch than string DACs, and DACs with parallel interfaces are a bit more friendly to digital feed-through since there is not a high frequency clock associated with those interfaces. However even devices with SPI interfaces could include some filtering on the SPI lines to minimize feed-through, though this must be balanced with the required SCLK rates to actually deliver the updates to the DAC.

The last thing I would point out is that generating a range of AC waveforms with different frequencies exacerbates this problem since we cannot really tune a filter to the specific desired output frequency.

In the end, maybe with THD / SNR / Amplitude requirements and some guidance on the desired frequency range would help us make a recommendation.

Hi Kevin,

I'm the end customer. Anthony is the FAE who supports us.

I'm looking after such DAC for test purpose. I have to build a special test setup (high pressure) for existing hardware and I can only test a subset of it, each time.

The current subset embeds a complete analog chain with an ADC. I want to see how the system behave when stressed.

The idea is to use a DAC to reconstruct the signal after the ADC.

Test signal will be a 50kHz single tone. Sampling frequency is 300kHz.

Its hard for me to specify any THD or SNR numbers. I intend to use a scope as basic check.

I need to keep the set up simple, so therefore parallel DAC is not an option.

I understand that it's not easy for you to give a clear answer about the capabilities of precision DACs when use in such a way.

I have ordered DAC8811EVM to build a setup and see what I will get out of it.

I choose DAC8811 because it has one of the lowest settling time.

Do this choice makes sense to you?

Would you recommend a different part?

Kind regards,

Pierre

Hi Kevin,

Thanks for pointing out the potential limitation due to output buffer.

Regards,

Pierre

Hi Kevin,
I have received the demo board with MMB0 mother board.
Between 1kHz and 50kHz, I have measured 0,25dB amplitude difference.
Of course H2 rises from -59dBc to -42dBc.
MMB0 is generating the tone at 1Msps although the GUI reports 200ksps. That gives enough samples (20 as you said above).
The simple RC filter of the board finally smoothes further the signal.
All in all, the result is good enough for my test application. I don't see any need to change the output buffer.
Regards,
Pierre