ADS1232 unwanted internal offset

Hi Bob,

Thanks for helping me.

Schematic:
easyeda.com/.../ads1232

Load cell:
www.hbm.cz/.../b1996.pdf

Hi Erisson,

Now I understand some of why the noise is higher. You have a voltage divider on the reference and are using 2.5V instead of 5V. The load cell sensitivity is 2mV/V and with 5V excitation the output maximum will be 10mV. At this range I would suggest using gain of 128 instead of 64 as this will provide the best input referred noise. I would also suggest removing the voltage divider on the reference and use 5V directly. The end result will be the same as what you are doing currently with less noise and drift. The voltage divider will have drift issues and will add thermal noise. Also because you are limiting current to the reference there may also be issues with sampling as you have no capacitor at the reference inputs for a charge reservoir. So remove R1 and short (or 0 Ohm resistor R2).

I would also short R3 or make closer to 1 to 2 Ohms. 100 Ohms will restrict the ADS1232 from needed current, especially on power-up.

C12 and C14 should be 1/10 or less the value of C13. It is possible to see a filter imbalance on the common-mode filters creating a difference voltage so you want to make the differential filter to be dominant. With C13 at 100nF, keep C12 and C14 to 10nF or less.

I would make these changes and check the noise again. If you apply a short to the analog inputs and mid-AVDD supply, you should see similar numbers as shown in the noise table of the datasheet. Once you have proven the circuit, then you can remove the short and apply the load cell. You should see similar noise numbers. If you do not then you are picking up external noise that needs to be eliminated.

Make the changes I suggested and report back the conversion values you are seeing.

Best regards,
Bob B

Hello Bob,

Thanks for the recommendations. I removed the R1 and put the R2 0hm. I removed the R3 and put a 10 Ohms resistor. I also switched capacitors C12 and C14 to 10nF. In the firmware I changed the gain to 128. Apparently the offset error that appeared from time to time disappeared, without being necessary to enter the calibration routine, however I need to do more tests. As for the error in reading the last 8 bits still remains the same.

As for the firmware, is there any specific technique for acquiring and handling the read values? I am currently reading through interrupt through a timer configured for 5us. I check if DRDY is at level 0, to start the process, save the values in rotary buffer and every 1ms I calculate the average of the buffer.

Hi Erisson,

I would suggest still doing the calibration at the time of power up of the ADS1232. This will remove any ADS1232 internal offset that is inherent to the device and not a part of the system.

If you are still seeing a lot of noise, then I would suggest doing the external short test that I recommended previously. You can build a voltage divider of equal values (2 - 10K Ohm resistors for example) from AVDD to AGND. At the junction of the resistors connect both AINP and AINN of the ADS1232 so that there is a short within the correct common-mode of the ADC input. Check to see if the noise decreases to around 4 bits. If it does, then you will need to remove noise entering the board which is often a result of noise pickup on the wiring. Using shielded wiring that is properly terminated is recommended. If the external short does not improve the noise, then you have noise pickup due to issues with your board that may require layout changes. If you are using a prototyping solution that has loop wiring and poor grounding, this is often the cause of the noise pickup. To get the best noise performance you really need a PCB with no digital signals in the analog portion and a solid ground plane under the ADS1232 and analog components.

For capturing the results, I often connect the DOUT/DRDY pin to both the SPI peripheral MISO and a GPIO that can trigger an interrupt on the high to low transition of the DOUT/DRDY signal. In this case there is no need to send 25 SCLKs to drive the DOUT/DRDY pin high to poll for a low state. Using this method:
1. Enable the interrupt for a high to low transition on the GPIO.
2. Wait for the interrupt to trigger, then disable the GPIO interrupt.
3. Read the 3 bytes of conversion data.
4. Clear the interrupt flag and go to 1.

When using the polling method, either by continually polling the state of the pin or by the use of a timer, you need to make sure that the DOUT/DRDY pin is high before you start the polling process otherwise you may capture the same data over and over again if the last bit of the conversion data is 0.

Best regards,
Bob B

Thanks Bob, I will develop a new layout.