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AFE58JD28: fs/2 spur

Part Number: AFE58JD28
Other Parts Discussed in Thread: , AFE58JD32

I am seeing a large spur at fs/2 due to each channel having an odd and even sampler. It seems that the dc offset for each is slightly different. I can remove the fs/2 spur in postprocessing by using the following code before an fft

idata[0::2] = idata[0::2]-np.mean(idata[0::2])  (remove offset on even data) 
idata[1::2] = idata[1::2]-np.mean(idata[1::2]) (remove offset on odd data)

then an fft of idata works as expected and there is no fs/2 spur.

I want to be able to remove the offset in the adc but on page 61 of the datasheet it says that
"These two register controls are duplicated in the Register Maps section and indicated as the OFFSET_CHx control because the same offset
must be subtracted from both the odd and even data stream."

On page 131 of the datasheet there are two registers for OFFSET_CH1 but it says to enter the same value from both.

Is there a way to correct the offset for odd and even values independently?

  • Hi James,
    How are you?
    Thanks for using AFE58JD28.
    First, could you please let us know whether you are using AFE58JD28EVM?
    and which kind of TSW board you are using as well?
    Also when you are talking about the spur at fs/2,
    could you please take a picture and show us?
    at the same time I will look into your question and replay to you in a couple days.
    Thank you very much!

    Best regards,
    Chen
  • I am not using the EVM. Screen shots of both before and after post processing correction. The chip says that it should be able to correct this offset but then says that in the manual offset registers that the value for even and odd per channel needs to be the same.

  • Hi James,
    How are you?
    Looks like the spur might be shown due to the input clock.
    We will contact you for more detail about your questions very soon.

    Thank you again!
    Best regards,
    Chen
  • I actually think it is sampling interleaving since this ADC has an odd and an even circuit sampler per channel.  Datasheet page 59.

    this thread is similar 

    e2e.ti.com/.../584724

    and there are others on the TI forums as well but I am interested in correction for my specific chip. The odd and even samples have a different dc offset and this is causing a spur at fs/2. I can remove it in post processing but it seems that the ADC should have this functionality. The Datasheet hints that it does but also says that the odd and even offset corrections need to be the same so I am confused as to how to implement it.

  • Hi James,

    For AFE58JD28 (16 channel AFE) another question related to the offset_CH1:
    Here is the explanation from our group system engineer:
    ==========
    If datrasheet said can’t remove odd and even offset differently, that is the case.
    The reason we have EVn and odd values is to support 32Ch mode in the ADC. while 5828 is a 16Ch device, no need to run in the 32Ch mode.
    ==========

    Thank you!

    Best regards,
    Chen
  • Hi James,

    How are you?
    That means since AFE58JD28 has only 16bit input channels,
    offset odd and even are the same (identical),
    therefore in these two registers there is no different.
    When the device has 32bit input channels such as AFE58JD32,
    offset odd and even are separated (independent),
    therefore in these two registers they are different.

    Thank you!
    Have a very nice day!

    Best regards,
    Chen