Other Parts Discussed in Thread: LMX2595EVM, LMK04828, LMX2595
Hey,
In our system we has the DAC38RF80EVM with a LMX2595EVM clock and are following steps in the DAC EVM's guide to set up an external LVDS clock.
I do have several questions based on looking at this procedure and at the schematic of the DAC EVM.
First, the last step mentions connecting J24 to the "reference input of the clock". J24 is connected to one of the output clocks of the LMK04828 (DCLKOUT4P) and I'm not entirely sure what is meant by the "reference input" of the clock. I would assume it means the SYSREF of the clock, but I don't believe that the output at J24 is the SYSREF signal of the system. Thoughts or am I missing something?
Second, are the SYNC signals on the LMX clock and at for the LMK at J8 necessary? They aren't mentioned in documentation at all. I know that JESD204B Subclass 1 devices requires both the SYSREF and SYNC signals for each transceiver and receiver, but I don't know if that includes clocks (or clock jitter cleaners) as well? Could you confirm whether they do and if so, where I would pull those sync signals from as it's unclear by looking in the schematic or guide.
Thanks,
Jared