Effect of external Sample/Hold, PGA with Delta Sigma ADCs

Hi Mahabir,

Do you have a particular PGA or ADC in mind for this application?

Most Sigma Delta ADCs have an integrated S/H circuit so using an external S/H circuit is usually not necessary. I would think using an extra S/H in the signal path would increase the overall latency and introduce additional errors into the measurement.

Also for Seismics applications, a device like the ADS1282 or ADS1283 would also provide an integrated PGA. The integrated PGA on these devices is very low noise (5nVrms/ sqrt[Hz]) and chopped to remove 1/f noise. There really aren't many comparable discrete amplifiers available that would provide the same level of noise performance:

1. ADS1282/3 are very good but the sampling rate is very low. I need selectable till 48Khz, which is not supported.

My old application uses, PCM1750U from BB, which two channel ADC, external S/H, Dynamic PGA (gain changes on each sample voltage, similar to AFP amplifier) and PCM1750U. It is old device and need to replace, without losing full scale range control for each sample level and upper and lower boundary nonlinearity, like to replace this ADC by new Sigma-Delta, which reduce external filtering of 50/60 Hz and Anti-Aliasing.

So if uses internal PGA and S/H for application, then external higher voltage scaling cannot be control, AGC will not work because it applicable for next sample, So without change distrubing of ADC, externally control as old system, and use few good features of it. I am afraid, that being holding and playing with voltage till gain settle, ADC may find change in voltage which is done by gain adjustment, even it is in 1-2 micro seconds and create wrong data being pipe.

Does S/H of sigma delta ADC sync with external clock, by any mechanism - clock of ADC etc. Because in application, I have similar 10-12 ADCs, how make sure the same phase they capture the data?

Does SYNC Input of ADS1283 can be considered similar to Start Convert Pulse in SAR ADCs and external MCU can generate this periodic pulse, e.g. 50Khz to get sample at every 20 usec (values are example, not suitable for ADS1283).

Hi Mahabir,

Typically ADCs are driven by a clock signal. In the case of Delta-Sigma ADCs, the clock frequency and over-sampling ratio (OSR) determine the output data rate. In most cases, you can also control the start of a conversion (or restart a conversion in progress). Therefore when you're using multiple ADCs, you can synchronize them if you use the same clock source to drive each ADC and then issue a start conversion command (or a SYNC pulse) to all ADCs simultaneously. When synchronized, the S/H circuits should be phase aligned to sample the signal at the same time.

The SYNC pin on the ADS1283 restarts the ADC's ongoing conversion process; however, outside of that it has no effect on the data rate or timing of conversions. The master clock gets divided down by 4 to generate the sampling clock (fMOD). The delta-sigma ADC continuously samples the input signal at this frequency, and then this data is averaged and decimated by the digital filter (according to the selected OSR).

Regarding the 50/60 Hz rejection, are you referring to the rejection of 50/60Hz line cycle noise on the analog inputs or on the ADC's power supply?
Most delta-sigma ADCs provide inherently good PSRR since they are mostly digital devices. However, 50/60 Hz rejection on the analog inputs is typically comes from the ADC's digital filter. Often times a SINC or FIR digital filter with an output data rate of 10 SPS or 20 SPS is selected to provide simultaneously 50/60Hz rejection. Otherwise, if you only needed to reject 50 or 60 Hz noise, you could use a SINC filter with a 50 or 60 SPS output data rate, since the SINC filter notches occur at integer multiples of the output data rate. If you're wanting to reject 50/60Hz noise while running the ADC at a higher data rate, this would typically need to be done by post-processing the data and running through a 50/60Hz notch filter.

NOTE: The ADS1283 has a SINC filter mode which allows it to run upto 128 kSPS.

How many channels do you need and have you looked at any of the other Audio ADCs or Precision ADCs? If you have any additional details or application requirements you can share perhaps I can help to recommend other suitable devices as well.