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My intended application is to use the DAC38RF82 in dual dac mode with real inputs LMF=821 while using the onboard VCXO (CMODE4),
I started with an example cfg file from another post.
8741.6144MSPS_8x_10M_ref_LMF_841.cfg
In the GUI I changed to
Dual Dac
Real Input
4x Interpolation
This almost works. The correct signals are output but they do not reliably align in phase. Hitting the 'Reset DAC JESD Core & SYSREF TRIGGER' button will yield different phase alignments each time. Occasionally they will be phase aligned. The phase misalignment appears to manifest in discrete steps.
I presume that the problem has something to do with how the different DACs utilize SYSREF. I tried playing around with the JESD Block settings but did not have any success.
I would appreciate an example cfg for my application or guidance on how to modify the settings properly.
Hey Matt,
I am looking into this and will let you know the results I get.
Regards,
David
Hi Matt,
With the changes you are making are you using the mixer or NCO? If you are, try changing both SYNC selects to "sync_out from JESD" or both to "sysref."
Regards,
David
No I don't intend to use the mixer or NCO.
I simply want each DAC to transmit patterns in phase with each other.
Matt,
Here is an example configuration file that is setup for LMF = 821 using the VCXO and Fs=6144MHz.
DAC38RF82_LMF_821_Fs_6144M.cfg
Regards,
David
David, I tried your cfg file but have the same issue.
The phase alignment between DAC A and DAC B is inconsistent. To be more specific the range is about +/-16ns. It is occasionally 0.
Also, the following errors are reported.
sysrefphase4 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync.
sysrefphase1 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync.
align_to_r3 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync.
align_to_r1 state has been observed in the sysrefalign logic at least once since the last sysrefalign sync.
"DAC A, Lane 0 multiframe alignment error"
"DAC A, Lane 1 multiframe alignment error"
"DAC A, Lane 2 multiframe alignment error"
"DAC A, Lane 3 multiframe alignment error"
"DAC B, Lane 4 multiframe alignment error"
"DAC B, Lane 5 multiframe alignment error"
"DAC B, Lane 6 multiframe alignment error"
"DAC B, Lane 7 multiframe alignment error"
The hardware I'm using is the DAC38RF82EVM with the TSW14J56. The evm has been configured per the (CMODE4) instructions in the EVM users guide.
Hi Matt,
I will be trying this configuration on an EVM and will let you know what solution I find.
Regards,
David
Hi Matt,
A solution I found is to use one slice to provide the data for both DACs. This can be accomplished by using the output sum selector to make DAC B use the same samples as DAC A.
To do this you can write 0x4 to address 0x219. This enables adding the Path AB samples for DAC B.
Regards,
David
David,
I'm back in the lab now after the holidays.
I tried your suggestion. I started with the configuration you posted prior (DAC38RF82_LMF_821_Fs_6144M.cfg). And then wrote 0x4 to address 0x219.
The resulting output still has inconsistent phase. It appears to behaving differently however.
I think I somewhat the strategy you suggested. The idea is to send my 2 channels of data to the slice 0 complex AB path. And to have A routed to DACA and B routed to DACB.
Some questions about this.
Wouldn't the JESD interface need to be reconfigured to use all 8 lanes for just slice 1 (for full data rate).
How are A and B split? If there is a 1x complex input on slice 1 wouldn't both A and B be fed into the complex mixer?
To give more context on what I'm doing, I want to feed I/Q data into the DAC38J84 and have I output on DACA and Q output on DACB. These are then fed into an external I/Q modulator. I'm confused as to why synchronization between DACA and DACB is not straightforward to achieve.
Matt,
I am taking over this post from David. In the beginning, the post mentions the DAC38RF82. In your last reply you mention DAC38J84. Which part are you using? If it is the DAC38RF82, after you load the configuration file and the TSW14J56EVM is sending data, load the attached file using the low level tab instead of clicking on the "Reset DAC and JESD Core & SYSREF Trigger". There are some settings that are not correct with this button which is causing the output phase to vary. One of the outputs has the signals swapped going to the transformer so the two outputs should always be 180 degrees out of phase.
Regards,
Jim
Apologies for the typo, It is the DAC38RF82.
I will give your suggestion a try, thanks.
Jim,
Thank you it is behaving as expected now and thanks for the note also about the signal swap.
For future readers, here is the naming polarity swap on the schematic for the EVM.