DAC38J84: NCO Reset in Multiple DAC's

Pavan

Intellectual 720 points

Part Number: DAC38J84

I am trying to Synchronize Multiple DAC38J84's at 100 MHz.

I am using NCO Accumulator to generate 600 MHz Output.

Sampling Rate = 1.9 GSPS

DAC Output = 100 MHz

Please Find the attached Block Diagram

1.I am resetting NCO on Sysref . Clocks and Sysrefs are alligned for both the DACs.

If I am using Continuous Sysrefs to reset NCO, then phase difference between the DAC outputs is constant.

But if I am using Sysref pulses to reset NCO, then phase difference is continuously changing after every sysref pulse event.

Please find the attached Doc

NCO RESET.ppt

Why the phase is changing after every Sysref pulse event. Since Clocks and Sysrefs are alligned, why there is phase difference between both the DAC outputs?

Please find the attached Configurations.

Fullscreen NCO_config_100MHz.txt Download

dac_write 0x00 0x0 
dac_write 0x00 0x1 
dac_write 0x00 0x218
dac_write 0x01 0x3
dac_write 0x02 0x2082
dac_write 0x03 0xA301
dac_write 0x04 0xF0F0
dac_write 0x05 0xFF07
dac_write 0x06 0xFFFF
dac_write 0x07 0x3100
dac_write 0x08 0x0
dac_write 0x09 0x0
dac_write 0x0A 0x0
dac_write 0x0B 0x0
dac_write 0x0C 0x400
dac_write 0x0D 0x400
dac_write 0x0E 0x400
dac_write 0x0F 0x400
dac_write 0x10 0x0
dac_write 0x11 0x0
dac_write 0x12 0x0
dac_write 0x13 0x0
dac_write 0x14 0x0
dac_write 0x15 0x0
dac_write 0x16 0x0
dac_write 0x17 0x0
dac_write 0x18 0x0
dac_write 0x19 0x0
dac_write 0x1A 0x20
dac_write 0x1B 0x0
dac_write 0x1E 0x9999
dac_write 0x1F 0x9980
dac_write 0x20 0x8008
dac_write 0x22 0x1B27
dac_write 0x23 0x1FF
dac_write 0x24 0x20
dac_write 0x25 0x4000
dac_write 0x26 0x0
dac_write 0x2D 0x1
dac_write 0x2E 0xFFFF
dac_write 0x2F 0x4
dac_write 0x30 0x0
dac_write 0x31 0x1000
dac_write 0x32 0x0
dac_write 0x33 0x0
dac_write 0x34 0x0
dac_write 0x3B 0x1800
dac_write 0x3C 0x228
dac_write 0x3D 0x88
dac_write 0x3E 0x108
dac_write 0x3F 0x0
dac_write 0x46 0x1882
dac_write 0x47 0x1C8
dac_write 0x48 0x3143
dac_write 0x49 0x0
dac_write 0x4A 0xF1E
dac_write 0x4B 0xF01
dac_write 0x4C 0x1F03
dac_write 0x4D 0x300
dac_write 0x4E 0xF0F
dac_write 0x4F 0x1C61
dac_write 0x50 0x0
dac_write 0x51 0xDC
dac_write 0x52 0xFF
dac_write 0x53 0x0
dac_write 0x54 0xFC
dac_write 0x55 0xFF
dac_write 0x56 0x0
dac_write 0x57 0xFF
dac_write 0x58 0xFF
dac_write 0x59 0x0
dac_write 0x5A 0xFF
dac_write 0x5B 0xFF
dac_write 0x5C 0x3333
dac_write 0x5E 0x0
dac_write 0x5F 0x3210
dac_write 0x60 0x5764
dac_write 0x61 0x211
dac_write 0x6C 0x7
dac_write 0x6D 0x90
dac_write 0x6E 0x0
dac_write 0x6F 0x0
dac_write 0x70 0x0
dac_write 0x71 0x0
dac_write 0x72 0x0
dac_write 0x73 0x0
dac_write 0x74 0x0
dac_write 0x75 0x0
dac_write 0x76 0x0
dac_write 0x77 0x0
dac_write 0x78 0x0
dac_write 0x79 0x0
dac_write 0x7A 0x0
dac_write 0x7B 0x0
dac_write 0x7C 0x0
dac_write 0x7D 0x0
dac_write 0x3B 0x1800
dac_write 0x25 0x6000
dac_write 0x3C 0x228
dac_write 0x3C 0x28
dac_write 0x3E 0x128
dac_write 0x4D 0x300
dac_write 0x4D 0x300
dac_write 0x4E 0xF0F
dac_write 0x00 0x418
NCO Configurations
dac_write 0x2f 0x0001
dac_write 0x30 0x7fff
dac_write 0x0D 0x0400
dac_write 0x02 0x20C2
dac_write 0x02 0x20D2
dac_write 0x12 0x0000
dac_write 0x13 0x0000
dac_write 0x14 0x50D8
dac_write 0x15 0x435E
dac_write 0x16 0x0D79
dac_write 0x17 0x50D8
dac_write 0x18 0x435E
dac_write 0x19 0x0D79
dac_write 0x1F 0x2220

2. My sysref Frequency is 3.7109375 MHz (Sysref Continuous), then NCO Reset is happening in both the DACs

If I reduce my sysref Frequency to 1MHz, then only NCO in one DAC is being resetted. Why?? Even at low frequency, both must be resetted.

3. I am configuring 0x2220 in register 0x1F.

Is it required to reset Mixer AB and Mixer CD, before resetiing the NCO ??

Is there any specific Sequence to do NCO Reset??

over 4 years ago

0 jim s over 4 years ago

TI__Guru* 91947 points

Pavan,

If you are using continuous SYSREF to reset the NCO, the frequency of the NCO must be a integer multiple of SYSREF. See section 5.1 of attached document. This document will also help with setting up for multiple device synchronization. You must reset the mixer before the NCO.

Regards,

Jim

0876.Device Initialization and SYSREF Configuration.pdf

0 Pavan over 4 years ago in reply to jim s

Intellectual 720 points

Hi Jim,

If I am using Sysref Pulser (Sending single Pulse From LMK), even then Phase Difference is not constant everytime.

Please refer to the NCO_reset PPT Attached in the above discussion.

For Sysref pulser, it is not required to maintain the frequency of the NCO as a integer multiple of SYSREF.

8203.NCO RESET.ppt

0 jim s over 4 years ago in reply to Pavan

TI__Guru* 91947 points

Pavan,

You need to make sure the DAC is receiving SYSREF properly and the NCO's are synced properly. Try the following to see where the issue is with your setup:

1. Do not use the NCO. Set address 0x24 to 0x0010 and address 0x5C to 0x1111 and use continuous SYSREF pulses. Verify the DAC outputs are synchronized.

2. Repeat step 1 but use at least 2 pulses from LMK, especially if SYSREF is AC coupled going to the DAC. Verify the outputs are synchronized.

3. Repeat step 1 but enable the NCO's.

4. Repeat step 2 but with NCO's enabled.

Regards,

Jim

0 Pavan over 4 years ago in reply to jim s

Intellectual 720 points

Hi Jim

1. How to ensure that DAC Clocks are aligned ?? Is there any mechanism to verify DAC Outputs allignment without Using SYSREF ??

2. DAC Clocks and Sysrefs need AC Coupling or DC Coupling ?? Which one is recommended ??

3. If Sysref is AC Coupled. will Sysref Oneshot feature work ??

0 jim s over 4 years ago in reply to Pavan

TI__Guru* 91947 points

Pavan,

1. If the LMK is using the same settings for the 2 DAC output clocks, they will be aligned. SYSREF is required for DAC output alignment. Without SYSREF, the output cannot be deterministic (subclass 1).

2. I would suggest AC coupling for the DAC clock and DC coupling for the SYSREF. If using DC coupling, must make sure common mode level is per the DAC data sheet specified value.

3. SYSREF should have a minimum of three pulses whether AC or DC coupled. This is required to synchronize the clock divider logic and JESD logic.

Regards,

Jim

0 Pavan over 4 years ago in reply to jim s

Intellectual 720 points

Hi Jim

I am doing NCO reset on Sysref (DAC38J84). I am having following queries

DAC Output = 100 MHz

DAC Clock = 1900 MHZ

1. NCO Reset happens on Rising edge / Falling Edge of Sysref ??

In my case, I am changing my sysref frequency. With respect to rising edge of Sysref, reset is happening at different times for different sysref frequencies.

But with respect to falling edge of Sysref, reset is happening always at fixed time around 160 ns.

So I must consider Rising edge or falling edge??

2. Number of Clock cycles required to reset NCO ??

After Sysref pulse, at what time reset happens.

Does it depend on Sysref Frequency ??

Is there any precise formula to calculate the exact time period ??

Exactly how many clock cycles will it take to reset NCO ??

3. My NCO ouput is 100 MHz. Now I have configured it to 600 MHZ, but reset is not done. Now will it maintain 100 MHZ output till reset is done ?? or there will be some garbage frequency ???

See attached images

Case a : Here 100 MHz is maintained on all 3 DACs till reset. After Reset frequency changed to 600 MHz

Case b : NCO is 600 MHz. Now it is updated to 100 MHz, Reset is not done, but 600 MHz looks to be distorted after NCO configuration, after reset 100 MHz is proper

Case C : Now 100 MHz to 600 MHz transition is done . On two DACs 100 MHz is distorted after NCO configuration, but on 1 DAC 100 MHz is maintained.

So at what point Frequency will update ??

I am seeing abnormal behavior. Sometimes it is changing after Sysref pulse, sometimes it is talking garbage value

0 jim s over 4 years ago in reply to Pavan

TI__Guru* 91947 points

Pavan,

Please run the test in the attached document to verify you are receiving SYSREF properly with the DAC's. Are you using AC or DC coupling for SYSREF?

Do this test for each DAC.

A few other comments:

The NCO syncing happens on rising edge of whatever sync is selected.

Both the mixer and NCO accumulator must be set to use the same SYNC source

The delay between SYSREF and NCO resync is dependent on the JESD frequency and the interpolation. Since there is clock handoffs that needs to happen, this is delay different for different setups.

You have to be careful that you are not accidently resynchronizing the CDRV_SER.

Regards,

Jim

0550.SYSREF trouble-shooting.docx

Regards,

Jim

0 Pavan over 4 years ago in reply to jim s

Intellectual 720 points

Hi Jim

We are using AC Coupling for Sysref.

Can this AC coupling Path accept single shot Sysref Pulses ??

We are able to reset NCO on continuous Sysref, but if we are sending Single pulsed Sysref, NCO reset is happening Multiple times and delay is also changing.

What is the exact hardware Sysref path (Resistor and Capacitor Combination ) between LMK and DAC , so that NCO reset happens on both continuous sysrefs and pulsed sysrefs??

What is the recommended standard at SYSREF ?? LVPECL or LCPECL ??

In datasheet, it was mentioned LVPECL, but with DC coupled Sysref, LVPECL standard is not working

0 jim s over 4 years ago in reply to Pavan

TI__Guru* 91947 points

Pavan,

You can use AC or DC coupling. If you use DC coupling, the LMK should use LCPECL mode with a resistor pie network to get the common mode voltage to the correct level. See attached EVM schematic.

If you use AC coupling, depending on the pulse period and caps used, you might need two to three pulses sent. The DAC requires at least 2 pulses for proper initialization of the clock and JESD logic blocks.

See attached document for more information.

Regards,

Jim

8540.DAC3XJ8XEVM-SCH_D.pdf 6332.Device Initialization and SYSREF Configuration.pdf

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DAC38J84: NCO Reset in Multiple DAC's