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ADS1261: Delay time before sampling

Part Number: ADS1261

Bryan

As from our previous conversations, I'm sampling at 7200sps in continuous mode and using the SINC3 filtering.  When using the ADS1261 Design Calculator spreadsheet (Digital Filter tab), I see that the initial settling time is .84ms for the first conversion and .14ms there after.  When does the settling time start?  After the last register write or after the start signal?  Again, I'm acquiring two channels.  The first channel will be sampled once, then the second channel will be sampled 10 time.  I assume I'll have to wait the .84ms for the first channel.  Again, I assume the first sample of the second channel will also require a wait time of .84ms.  But considering that I'm running in continuous mode, should I use the MODE1 register to set a conversion start delay to lets say .189ms or can I collect the data as it comes on every DRDY?  

  • Hi Dennis,

    The programmable delay is there to account for any settling time that is external to the ADC. For example, if your external anti-aliasing filter had a very long time constant, you might want to wait some time before sampling in order to ensure that the filter has settled to its final value. So, once you initiate a conversion, you could program the ADC to wait this additional time period to allow the external filter to settle before the ADC actually begins sampling (as you don't want to sample an unsettled signal).

    When you take the START pin high, the device begins the conversion process immediately (the datasheet specifies a max delay of 2/fCLK between the START command and DRDY going high). The programmed delay would then begin, and when this time has passed the device actually starts sampling. The times specified in Table 8 are taken from the time START is brought high to when DRDY goes low, so this includes the default programmed delay of 50 us. If you include a longer delay, then you would need to add this time to the values in Table 8.

    If you are acquiring two channels, the first conversion on the first channel will take 0.841 ms assuming the delay is 50 us and you are using the sinc3 filter at an ODR of 7200 SPS. When data on this channel is ready (DRDY goes low), you can switch to the next channel, initiate a conversion, then read the previous channel's data. To read conversion data before the next conversion is ready in continuous conversion mode, send the complete read-data command16 fCLK cycles before the next DRDY falling edge.

    The first conversion on the second channel will take 0.841 ms assuming the delay is 50 us and you are using the sinc3 filter at an ODR of 7200 SPS. Subsequent conversions will take approximately 1/ODR = 1/7200 = 0.139 ms. So the overall time to read 10 consecutive conversions on a single channel will be 0.841 ms + 9*0.139 ms = 2.092 ms

    -Bryan

  • Bryan

    Thank you for the quick response.  So as I understand this correctly, the .841ms delay will automatically happen.  It is not part of the Conversion Start Delay in MODE1 register.  If I were to set the Conversion Start Delay in MODE1 register to say 189us, would the total delay would be 139us longer?  

    To the point of the anti-aliasing filter, the input from the sensor is a DC value and any changes will occur very slowly (no step changes).  Therefore, I don't think I have to worry about the anti-aliasing filter settling from sample to sample.  Your thoughts please.  

    In your third paragraph, you say I can switch to the next channel, initiate a conversion, then read the previous channel's data.  I thought while in continuous mode, that when I switched channels (wrote to the INPMUX or the PGA registers) that would automatically initiate a conversion.  In addition, can I switch back to channel one before I read the tenth sample on channel two?  

  • Hi Dennis,

    The 0.841 ms is not a delay, it is the conversion time, or the time that it takes the ADC to sample the input signal and provide an output. The programmable delay is a portion of this time. So yes, you are correct, the times in Table 8 account for 50us of the programmable delay, so if you changed the delay to some other time, tDELAY, then you would subtract 50us from tDELAY and add this to the time specified in Table 8. Your example of 189us is correct (add 139us to the time in Table 8)

    I believe you are correct about the anti-aliasing filters, if the filter cutoff is sufficient this will likely not be an issue. This is maybe more for you to consider just in case you have faster moving signals or might need to accommodate step changes. But in general the analog filters should be settled on a per channel basis since the sensor output will always be connected and the output changes very slowly. This might be more important when you have an external multiplexer feeding into a single-channel ADC. Here is some more information about how to select the component values, etc. for an anti-aliasing filter: https://e2e.ti.com/support/data-converters/f/data-converters-forum/955466/faq-delta-sigma-adc-anti-aliasing-filter-component-selection

    Yes you are correct, not all devices have this feature. But if you change the MUX register using the ADS1261 the device restarts the conversion. So this is not necessarily a step you need to manually perform, but should be aware needs to occur, as not all register writes cause a conversion to be restarted (see Table 29 for more info)

    -Bryan

  • Thank you.  You've been very helpful.