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DLP3310: Please clarify how full HD resolution is obtained on the 3310

Part Number: DLP3310
Other Parts Discussed in Thread: DLPC3437, DLPDLCR3310EVM, DLP3010, , DLP4710

The device datasheet specifies a mirror array of 1368x768 pixels, and in other messages in the forum it is stated that each mirror is used to display two unique pixels, thus allowing a true 1920x1080 display. For some of your DLP products, people obtain higher display resolution than the number of mirrors by using beam/pixel shifting devices, and indeed on the 3310 eval board schematic [sheet 14, connector J5] there seems to be a driver circuit for such a device, but I did not see one mentioned in the related documents.

Question #1: Does the 3310 eval unit use a pixel/beam shifter device, or does it double the pixels using only its own mirrors?

Question #2: If a beam/pixel shifter is required and used in the demo, could you disclose the vendor and part#?

Question #3: Is this pixel doubling performed in the DLPC3437 devices, or in the very expensive (and currently unavailable) Xilinx FPGA?

Question #4: Current supply chain issues are making many devices unavailable in the near-term, and I would like to standardize on a particular DMD. If a current application can live with the 3310's native 1368x768 image, can this (using the native resolution) be easily done on the 3310 chipset without the additional pixel shifting, preserving the possibility of later going to the full 1080P using the same DMD, controller pair and power manager, and adding the pixel shifting technique?

  • Hello User,

    1.) We have a document that may explain some of these details better here. If you search through it for actuator it will show up.

    3.) The pixel doubling would be done by a FPGA.

    We will look into your other concerns and get back to you.



  • Hello User,

    Please allow me to expand your questions.

    Question #1: The DLPDLCR3310EVM is able to effectively double the pixels output by using an actuator. This is lens that will shift half of the pitch between pixels at such a rate that the resolution will appear to double.

    Question #2: The optical engine for this EVM is actually not developed by Texas Instruments but our partners at Young Optics. I will look into if we have this information. Otherwise it might be necessary to contact Young.

    Question #3: The FPGA interprets the video data and drives the actuator to perform the pixel doubling.

    Question #4: I am looking into this feasibility. My initial reaction is that there should not be an issue bypassing the FPGA and actuator without a drop in performance, but I am reaching out to the hardware team to confirm.

    Kind regards,


  • Hello User,

    To follow up on the questions that were left open:

    Question #2: We do not have this information to disclose since it is a part of Young Optics' design. Please reach out to them for more information on this actuator.

    Question #4: I need to correct my previous statement. The DLPC will wait for a confirmation signal from the FPGA. If you are unable to acquire an FPGA to serve this purpose I recommend considering the DLP4710 to achieve 1080p resolution or the DLP3010 if you are looking to meet comparable size and power characteristics.

    Thank you for your business!



  • Thanks, but the update to the answer to question#4 is a bit confusing. Are you saying that the TI DLP3310 chipset is entirely unusable without a specific very expensive and unavailable Xilinx FPGA, or are you indicating that the chipset would be able to function at its native 1368x768 resolution but for the absence of a "confirmation signal", which is provided by the FPGA in the demo unit?

    If this "confirmation signal" is just an incidental thing, like the controller is waiting for a simple "I'm ready" from the FPGA as a side effect of the demo unit design in which the controllers are working cooperatively with the FPGA to do a bunch of stuff I do not really need, then could TI disclose the nature of the confirmation signal (perhaps with an NDA, and not covering any of the other secret sauce of the important TI IP) so that a design can go forward using the 3310 chipset without the particular FPGA used in the demo unit? I am not opposed to having an FPGA in my design, even one that needs to generate a slightly complex "ready" handshake, but what I certainly need is an actual solution that is composed of available devices, and currently I have had no success obtaining the DLP4710 chipset or the FPGA used in the demo.

  • Hello Tim,

    The DLP technology is chipset solution. The DLP3310 DMD along with associated components DLPC3437, FGPA and PMIC IC are designed to support 1080P resolution in .3 inch diagonal. Every component including FPGA are required for reliable operation. The controller firmware will not boot if any of the component is missing or not connected.

    We understand , availability of FPGA may be a concern. Depending on your application requirement , you can choose an alternate chipset from DLP portfolio. For example if panel size is important then we please consider DLP3010 DMD (1280x720) which similar in panel size and close to you are asking for . If 1080P resolution is critical then please  consider DLP4710 DMD (1280x0180).