DLP3021-Q1: FPGA Interrupt Register and HOST_IRQ Control

Johns Chuang

Part Number: DLP3021-Q1

Dear

I want the HOST_IRQ pin to change every time a video playback ends.

I tried following the steps in section "4.4 Host IRQ Interrupt Signal" and "4.1.6 Example 5: Display 3+ Videos/Images Seamlessly" in the "FPGA User's Guide".

But it didn't work, as long as any Interrupt Enable is set, HOST_IRQ always stays high and I don't know how to set FPGA Interrupt Set or Clear.

Regarding the following steps, do you think my understanding is incorrect?

MCU sends the read FPGA Interrupt SET instruction via MOSI：{0x01 0x04 0x00 0x00 0x00 0x00 0x00 0x00 0x00}
MCU receives the FPGA Interrupt SET data sent back by FPGA via MISO：{0x00 0x01 0x04 0x00 0x00 0x00 0x00 0x00 0x05}
MCU sends the clear FPGA Interrupt CLR instruction via MOSI：{0x00 0x00 0x00 0x01 0x00 0x00 0x00 0x01}
At this point, HOST_IRQ will be pulled low until the condition set by Interrupt Enable (0x08) is met, then HOST_IRQ will return to high.

Assuming that the VID_LOP_COMP_IRQ of the FPGA Interrupt Enable (0x08) is High, and then repeating the actions 1~3, then HOST_IRQ will be pulled back to High each time a video is finished playing.

Do you have any other operation suggestions in addition to the following MSP430 sample program?

...

//interrupt register read must have valid checksum

while(!success)

{

success = spiread(FPGA_ADDR_INTSET, &interrupts);

}

spiwrite(FPGA_ADDR_INTCLR, interrupts); //Clear interrupts that are set so host irq goes low

if(interrupts & INT_INIT_DONE)

{

...

Thank you for reading and your assistance.

over 2 years ago

0 Akeem Whitehead over 2 years ago

TI__Mastermind 27950 points

Hi Johns,

Have you updated the following function within the if(interrupts & INT_INIT_DONE) statement?

enableFPGAInterupts(INT_BROWNOUT | INT_VID_COMP); // Enable brownout and video loop complete interrupts

This function needs to be updated in the MSP430 code example to enable interrupts events in addition to the brown-out detect set by default. Simply append " | {INT FLAG NAME} " within the function call as I have shown above for the interrupt events you need to enable.

The updated code snippet should look something like this:

Fullscreen

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if(interrupts & INT_INIT_DONE)
{
    ...
    enableFPGAInterupts(INT_BROWNOUT | INT_VID_COMP);
    //Do something when system is initialized
    interrupts = 0; // Set global interrupt flag to '0' to clear
}
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

if(interrupts & INT_INIT_DONE)
{
    ...
    enableFPGAInterupts(INT_BROWNOUT | INT_VID_COMP);
    //Do something when system is initialized
    interrupts = 0; // Set global interrupt flag to '0' to clear
}

0 Johns Chuang over 2 years ago in reply to Akeem Whitehead

Intellectual 270 points

Hi Akeem

So when I change INT_LOOP_COMP to INT_VID_COMP, then the HOST_IRQ should be triggered every time a video is finished playing, and the MSP430 should also enter the FPGA interrupt, right?

Do you think if I set INT_VID_COMP directly in the DLP Composer, it will have the same effect?

Or does this part have to be set by the MCU after FPGA initialization?

Thank you for your time.

+1 Akeem Whitehead over 2 years ago in reply to Johns Chuang

TI__Mastermind 27950 points

Hi Johns,

Yes, when INT_VID_COMP is set, then the HOST_IRQ will trigger every time a video is finished playing, and the MSP430 will enter the interrupt routine.

If you set the VID_CONFIG_COMP_IRQ_FLD is DLP Composer, then you do not need to set INT_VID_COMP in the MCU.

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DLP3021-Q1: FPGA Interrupt Register and HOST_IRQ Control