DLPC1438: Solve the issue of SPI Ready Status Keeping Low

David Yuan

Part Number: DLPC1438

Tool/software:

Is any other way to solve the spi ready status keep low ?

Is it possible that use the Standby Mode command to recover it ?

We check that we sent the correct data to the 1438, but sometimes would happen the spi ready status keep low, we want to recover it without projector off the light engine, so any command we can use?

over 1 year ago

0 Lori Wang over 1 year ago

TI__Genius 11565 points

Hello David,

The standby mode disables illumination power and sets the DMD in 50-50 refresh duty cycle, it should not affect SPI_Ready signal. When the SPI_Ready signal is pulled low, this indicate the FPGA cannot yet accept a SPI packet due to processing time requirements.

Can you please confirm if you can read back the FPGA CRC16 value and check SPI CRC Error? (I was referring to another E2E post: https://e2e.ti.com/support/dlp-products-group/dlp/f/dlp-products-forum/1403460/dlpc1438-issue-of-data-transfer-to-the-dlpc1438)

Regards,

Lori

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DLPC1438: Solve the issue of SPI Ready Status Keeping Low