DLP660TE: DLPDLCR660TEVM and DLPLCRDC4422EVM VX1 setting

user4462350

Prodigy 90 points

Part Number: DLP660TE
Other Parts Discussed in Thread: DLPC4422

Hi TI engine，

When using DLPDLCR660TEVM and DLPLCRDC4422EVM development board, We encountered some problems in use.

Use environment

Hardware: DLPDLCR660TEVM ,DLPLCRDC4422EVM and usb cable

sofeware: DLPC4422 GUI 1.0, DLP660TE_Chipset_Firmware_v9.0(DLP660TE_chipset_FPGA.rpd and Flash_DUAL_DLPC4422_DLP660TE_LED.img)

Current situation

Flash download, use usb cable to connect PC and EVM board, the burning is normal, after completion, there is no error or warning.

when the system starts, the flash image is displayed, indicating that the Flash_DUAL_DLPC4422_DLP660TE_LED.img is successfully burned and the DMD is working normally. and Display-->TPG Testpattern, set normally.

Issue

1 The version of FPGA obtained is 0.0.0. Is this correct?

2 The FPGA TPG has not been displayed, why? How to set configuration parameters to display the FPGA test pattern (FPGA TPG)? How to verify that FPGA works normally?

Configure in DLPC4422 GUI

First step, Display -->Projection Mode (external);

second step, FPGA Control --> FPGA UHD TPG-->XPR ON UHD TPG (240Hz_4XPR ) and XPR OFF 2D TPG( 120Hz ) .

-->FPGA TPG Pattern Select--->Test Pattern . DMD does not display any image.

3 The selection of VX1 development board. Is the VX1 interface of DLPC4422 the same as the XV1 interface of DLPC6421? Can the VX1 development board be universal?

Looking forward to your reply, thank you.

Regards
Silas

over 4 years ago

0 user4462350 over 4 years ago

Prodigy 90 points

Hi TI engine，

Use environment

Hardware: DLPDLCR660TEVM ,DLPLCRDC4422EVM and usb cable

sofeware: DLPC4422 GUI 1.0, DLP660TE_Chipset_Firmware_v9.0(DLP660TE_chipset_FPGA.rpd and Flash_DUAL_DLPC4422_DLP660TE_LED.img)

DLP660TE_chipset_FPGA.rpd and Flash_DUAL_DLPC4422_DLP660TE_LED.img, The burning method of these two files is the same, and there are no errors and warnings displayed.

When the system starts, the serial port prints the following information:
source: DisplaySFG size = 1358 x 1528
illumination: Enabling SSI Driver...
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249

Shows that there is a problem when fpga starts.

After the system is started, the DMD operation is normal, and the FPGA operation does not respond.

The above problems need your help. The attachment is the startup log information, please refer to it. thanks

Regards

Silas

Fullscreen init.log Download

In Bootloader: v6.0.0

Debug opened on URT0
EEPROM content is valid
EEPROM: Initializing Slave EEPROM: 3336 bytes
sysmon: System Startup State From AppCfg is 0
sysmon: Notify uC ASIC is running.
sysmon: 1.8V power enabled via PMD

Serial Flash NVM = 0xEFCF

API version: 09.00.00
App version: 09.00.00
ASIC ID: 50
ASIC Configuration: 4422
Configuration layout versions:
     Seq Map: 44.21.0020
     SW Map: 44.21.0000
     EEPROM: 09.00.0000
*****Through DDP_Init cw & seq*****
projectorCtl: Opening projector control on USB

illumination: Starting SSI Initialization...
  Configuring SPI Driver(s)...
  Setting Packet Sizes...
  Setting Level Packet Bit Depth...
  Initializing SPI Driver...
  SPI Driver initialized...
  Reading SPI Driver ID...
SPI Driver Infomation: MFG ID = 0x00, Hardware ID = 0x00, FirmwareID = 0x00...
  Configuring Red Timing Packet...
  Configuring Green Timing Packet...
  Configuring Blue Timing Packet...
  Setting drive levels to 0 for channel 0.
  Setting drive levels to 0 for channel 1.
  Setting drive levels to 0 for channel 2.
  Configuring Sensor. Type = 1.
  Initializing CCI configuration...
SSI_Calibration  EE_GetVAR command Successful...
  SSI initialization complete
illumination: Completed illum_Init
sysmon: Through _sysReset
sysmon: System Startup State From AppCfg is 0
systemmode: There are 4 defined System Modes
systemmode: TwoD System Mode Table Created
systemmode: HighSpeed System Mode Table Created
systemmode: XPR System Mode Table Created
systemmode: ThreeD System Mode Table Created
TRP_DMD_FUSE_ID 7
DMD FUSE ID VALIDATED - 7
source: EEPROM defined
source: SetUserSFGColor = 0
source: DisplaySFG Color = 0
source: DisplaySFG size = 1358 x 1528
illumination: Enabling SSI Driver...
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGAcontrol_LoadFilters - FPGA filter set to 0
FPGA Write Unsuccessful, returned 249
source: SPLASH_LoadImage reload addresses:  0xf9200000, 0xf7ff35f4
source: SPLASH_LoadImage addresses:  0xf9200000, 0xffffffff
source: Loading RGB -> RGB CSC table
source: DisplaySplash size = 1390 x 1528
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
FPGA Write Unsuccessful, returned 249
illumination: DMD Unparked
illumination: Setting SSI Currents on Primary Ports.
illumination: Setting SSI Currents on Secondary Ports.
illumination: Enabling SSI Illuminators.
sysmon: System Startup State From AppCfg is 0
source: DisplaySFG Color = 0
source: DisplaySFG size = 1358 x 1528

0 Fizix over 4 years ago in reply to user4462350

TI__Guru 54320 points

Hello Silas,

Sorry for the delay on this. We will consult with the team that covers this EVM to see if they have any suggestions for you.

Fizix

0 Oscar Guevara over 4 years ago in reply to Fizix

TI__Intellectual 2245 points

Silas,

From what you have shared, it seems like the FPGA was not properly programmed. The build should read 356.
You are able to program the FPGA yourself using the GUI and the firmware package of the DLP660TE.

Using the flash loader, select the "DLP660TE_chipset_FPGA.rpd" in the directory of the firmware.
Then select complete image download with the "skip boot loader area" unchecked.
Lastly make sure to select the serial flash and not the ASIC flash. This is important as you want to avoid deleting the bootloader from the Asic flash.
The GUI should look like the image below.

Once program you can enable the TPG by using the following commands:

1. Set Projection mode to External (
2. Set XPR OFF 2D TPG
3. Select the desired TPG under the "FPGA TPG Pattern Select"

Also I believe the DLPC6421 Vx1 parameters are meant for their Xilinx FPGA while the DLPC4422 EVM uses an Altera FPGA. So I don't believe they are compatible.

Regards,
Oscar

0 user4462350 over 4 years ago in reply to Oscar Guevara

Prodigy 90 points

Hi Oscar,

Thank you for your reply. This problem has been solved by FAE engineers in China.

The causes of the problem are: The Altera FPGA on the dlp4422 EVM board does not match the version 9.0 of DLP660TE_chipset_FPGA.rpd .

After the Chinese FAE engineer updated a version of the rpd file, the FPGA works after burning.

There is another question. The bootloader of another board was erased by us. How to restore it?

1 I am sure the bootloader has been erased.

2 We have some JTAG and other burning tools.

3 "DLPC4422: EVM Boot Loader destroyed" https://e2e.ti.com/support/dlp/f/94/p/945802/3506573?tisearch=e2e-sitesearch&keymatch=DLP660Te#3506573,

We have already browsed webpages with similar problems. We need some specific instructions to restore the bootloader step by step.

thanks.

Silas

0 Matt Soucek over 4 years ago in reply to user4462350

TI__Expert 3700 points

Hi Silas,

Glad to hear that the first issue has been resolved.

We will reply to the follow up question later this week. Thank you for your patience during the Thanksgiving holiday time.

Regards,

Matt

0 Oscar Guevara over 4 years ago in reply to Matt Soucek

TI__Intellectual 2245 points

Silas,

Let's take this conversation offline.
Please accept my friend request.

Regards,
Oscar

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DLP660TE: DLPDLCR660TEVM and DLPLCRDC4422EVM VX1 setting