Hi Rahul,
I have been discusing this issue on other thread. You ask for a new post for easy track. Here is this new post.
The RBL only reads the 40 bytes (high lighted) then stops. What might be the problem? I am attaching the scope capture for your inspection. That includes analog display for Chip Select.
Thank you.
Regards,
Steve
Rahul,
Without completely understand your message above, I just load spirom_le.swap.bin to FLASH.
RBL read 00 50 00 continuously without proceeding. See attached scope capture. Thanks.. Steve. 
Rahul,
Thanks for the reply. We changed boot switch to 24 bit address and RBL went further. It read first 80 bytes. Then reading address 0x510400 got value 0x00000000, and continue reading it indefinitely.
Now DEVSTAT register value is 0x0000140D.
Our hardware boot switches are controled by FPGA and cannot altered easily. Why do we need to have boot switches to no-boot to write SPI FLASH. We use M25P80 1MB Flash. We can write to FLASH without problem regardless of boot switch.
Thank you.
Steve
Rahul,
I am getting a bit further by hand modify the the 0x51 to 0x00.
Now the RBL repeatedly reading at address 0x400 for 4 bytes, then 0x404 for a lot of bytes.
Thank you.
Regards,
Steve
Rahul,
I changed DDR3 address in simple.cmd file. simple.map is attached as simple.map.txt. When C6657 boot with the file in FLASH, either emulator cannot connect to target or cannot load code to run. So I don't know how to check if the DDR3 initialized correctly. Our hardware is very similar to the EVM, except we use M25P80 FLASH (SPI mode = 1).
My EVM is down now and need to be fixed.
Thank you.
Regards,
Steve
******************************************************************************
TMS320C6x Linker PC v7.4.2
******************************************************************************
>> Linked Thu Feb 20 10:16:03 2014
OUTPUT FILE NAME: <simple.out>
ENTRY POINT SYMBOL: "_c_int00" address: 80010000
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
PAGE 0:
DDRCFG 008ffd20 00000180 00000068 00000118 RWIX
PAGE 1:
TEXT 80010000 00000040 00000040 00000000 RWIX
DATA 80010100 00000004 00000004 00000000 RWIX
BYTE1 80010201 00000001 00000001 00000000 RWIX
BYTE2 80010210 00000002 00000002 00000000 RWIX
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.ddrCfg 0 008ffd20 00000068
008ffd20 00000068 ddrcfg.obj (.ddrCfg)
.text 1 80010000 00000040
80010000 00000040 simple.obj (.text)
.data 1 80010100 00000004
80010100 00000004 simple.obj (.data)
.byte1 1 80010201 00000001
80010201 00000001 simple.obj (.byte1)
.byte2 1 80010210 00000002
80010210 00000002 simple.obj (.byte2)
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
address name
-------- ----
00000000 $bss
80010100 .data
80010000 .text
008ffd7c EccAddrRange1
008ffd80 EccAddrRange2
008ffd78 EccCtrl
008ffd20 EnableBitmap
008ffd48 IODFT_TLGC
008ffd58 IrqEnable
008ffd70 MtrIdClassMap1
008ffd74 MtrIdClassMap2
008ffd40 NVMTiming
008ffd4c PerfCtrCfg
008ffd50 PerfCtrSel
008ffd64 PhyCtrl1
008ffd68 PhyCtrl2
008ffd24 PllCfg
008ffd44 PowerMgmt
008ffd6c PriClassMap
008ffd54 RdIdleCtl
008ffd84 RwExcThresh
008ffd28 SDRAMConfig
008ffd2c SDRAMConfig2
008ffd30 SDRAMRefreshCtl
008ffd34 SDRAMTiming1
008ffd38 SDRAMTiming2
008ffd3c SDRAMTiming3
008ffd60 TempAlertCfg
008ffd5c ZqCfg
ffffffff ___TI_pprof_out_hndl
ffffffff ___TI_prof_data_size
ffffffff ___TI_prof_data_start
ffffffff ___binit__
ffffffff ___c_args__
ffffffff ___cinit__
80010100 ___data__
80010104 ___edata__
80010040 ___etext__
ffffffff ___pinit__
80010000 ___text__
80010000 _c_int00
ffffffff binit
80010201 byte1
80010210 byte2
ffffffff cinit
80010104 edata
80010040 etext
ffffffff pinit
80010100 someData
GLOBAL SYMBOLS: SORTED BY Symbol Address
address name
-------- ----
00000000 $bss
008ffd20 EnableBitmap
008ffd24 PllCfg
008ffd28 SDRAMConfig
008ffd2c SDRAMConfig2
008ffd30 SDRAMRefreshCtl
008ffd34 SDRAMTiming1
008ffd38 SDRAMTiming2
008ffd3c SDRAMTiming3
008ffd40 NVMTiming
008ffd44 PowerMgmt
008ffd48 IODFT_TLGC
008ffd4c PerfCtrCfg
008ffd50 PerfCtrSel
008ffd54 RdIdleCtl
008ffd58 IrqEnable
008ffd5c ZqCfg
008ffd60 TempAlertCfg
008ffd64 PhyCtrl1
008ffd68 PhyCtrl2
008ffd6c PriClassMap
008ffd70 MtrIdClassMap1
008ffd74 MtrIdClassMap2
008ffd78 EccCtrl
008ffd7c EccAddrRange1
008ffd80 EccAddrRange2
008ffd84 RwExcThresh
80010000 .text
80010000 ___text__
80010000 _c_int00
80010040 ___etext__
80010040 etext
80010100 .data
80010100 ___data__
80010100 someData
80010104 ___edata__
80010104 edata
80010201 byte1
80010210 byte2
ffffffff ___TI_pprof_out_hndl
ffffffff ___TI_prof_data_size
ffffffff ___TI_prof_data_start
ffffffff ___binit__
ffffffff ___c_args__
ffffffff ___cinit__
ffffffff ___pinit__
ffffffff binit
ffffffff cinit
ffffffff pinit
[49 symbols]
I do have -e _c_int00 in my rmd file. I change spiboot.cmd file to allocation all into MCSC. Please see attached map and rmd files.
After the boot, I stop the processor and file PC is in a loop. see the following. Also, while connected to target, I did a system reset and load the code to run. But it goes to that PC and running in the loop again. What is the problem?
******************************************************************************
TMS320C6x Linker PC v7.4.2
******************************************************************************
>> Linked Fri Feb 21 11:17:08 2014
OUTPUT FILE NAME: <spiboot.out>
ENTRY POINT SYMBOL: "_c_int00" address: 0c0008a0
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
DDR_CFG 0c000000 00000180 00000178 00000008 RWIX
L2MAGIC 0c000200 00000004 00000000 00000004 RWIX
DDR 0c000210 00002000 00000d0c 000012f4 RWIX
SEGMENT ALLOCATION MAP
run origin load origin length init length attrs members
---------- ----------- ---------- ----------- ----- -------
0c000000 0c000000 00000178 00000178 r--
0c000000 0c000000 00000178 00000178 r-- .emif4Cfg
0c000210 0c000210 0000000c 0000000c rw-
0c000210 0c000210 0000000c 0000000c rw- .fardata
0c000220 0c000220 000008e0 000008e0 r-x
0c000220 0c000220 000008e0 000008e0 r-x .text
0c000b00 0c000b00 00000400 00000000 rw-
0c000b00 0c000b00 00000400 00000000 rw- .stack
0c000f00 0c000f00 00000020 00000020 r--
0c000f00 0c000f00 00000020 00000020 r-- .cinit
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.emif4Cfg
* 0 0c000000 00000178
0c000000 00000178 spiboot.obj (.emif4Cfg)
.fardata 0 0c000210 0000000c
0c000210 0000000c rts6600_elf.lib : exit.obj (.fardata)
.text 0 0c000220 000008e0
0c000220 00000180 rts6600_elf.lib : copy_decompress_rle.obj (.text:__TI_decompress_rle_core)
0c0003a0 00000100 : autoinit.obj (.text:_auto_init_elf)
0c0004a0 00000100 : cpy_tbl.obj (.text:copy_in)
0c0005a0 000000e0 : copy_zero_init.obj (.text:decompress:ZI:__TI_zero_init)
0c000680 000000c0 : exit.obj (.text:exit)
0c000740 000000c0 : tls.obj (.text:tls:init:__TI_tls_init)
0c000800 000000a0 : memcpy64.obj (.text:memcpy)
0c0008a0 00000080 : boot.obj (.text:_c_int00)
0c000920 00000060 : cpp_init.obj (.text:__TI_cpp_init)
0c000980 00000040 : args_main.obj (.text:_args_main)
0c0009c0 00000040 : tls.obj (.text:tls:get_addr:__c6xabi_get_addr)
0c000a00 00000020 : exit.obj (.text:abort)
0c000a20 00000020 : copy_decompress_none.obj (.text:decompress:none:__TI_decompress_none)
0c000a40 00000020 : copy_decompress_rle.obj (.text:decompress:rle24:__TI_decompress_rle24)
0c000a60 00000020 : copy_decompress_rle.obj (.text:decompress:rle:__TI_decompress_rle)
0c000a80 00000020 spiboot.obj (.text)
0c000aa0 00000020 rts6600_elf.lib : tls.obj (.text:tls:block_size:__TI_tls_block_size)
0c000ac0 00000020 : tls_get_tp.obj (.text:tls:get_tp)
0c000ae0 00000020 : tls.obj (.text:tls:main_base:__TI_tls_main_thread_base)
.stack 0 0c000b00 00000400 UNINITIALIZED
0c000b00 00000008 rts6600_elf.lib : boot.obj (.stack)
0c000b08 000003f8 --HOLE--
.cinit 0 0c000f00 00000020
0c000f00 0000000d (.cinit..fardata.load) [load image, compression = rle]
0c000f0d 00000003 --HOLE-- [fill = 0]
0c000f10 00000008 (__TI_handler_table)
0c000f18 00000008 (__TI_cinit_table)
LINKER GENERATED COPY TABLES
__TI_cinit_table @ 0c000f18 records: 1, size/record: 8, table size: 8
.fardata: load addr=0c000f00, load size=0000000d bytes, run addr=0c000210, run size=0000000c bytes, compression=rle
LINKER GENERATED HANDLER TABLE
__TI_handler_table @ 0c000f10 records: 2, size/record: 4, table size: 8
index: 0, handler: __TI_decompress_rle24
index: 1, handler: __TI_decompress_none
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
address name
-------- ----
0c000a00 C$$EXIT
0c000f18 __TI_CINIT_Base
0c000f20 __TI_CINIT_Limit
0c000f10 __TI_Handler_Table_Base
0c000f18 __TI_Handler_Table_Limit
UNDEFED __TI_INITARRAY_Base
UNDEFED __TI_INITARRAY_Limit
0c000f00 __TI_STACK_END
00000400 __TI_STACK_SIZE
00000000 __TI_STATIC_BASE
UNDEFED __TI_TLS_BLOCK_SIZE
UNDEFED __TI_TLS_INIT_Base
UNDEFED __TI_TLS_INIT_Limit
UNDEFED __TI_TLS_MAIN_THREAD_Base
00000001 __TI_args_main
0c000920 __TI_cpp_init
0c000a20 __TI_decompress_none
0c000a60 __TI_decompress_rle
0c000a40 __TI_decompress_rle24
0c000218 __TI_enable_exit_profile_output
ffffffff __TI_pprof_out_hndl
ffffffff __TI_prof_data_size
ffffffff __TI_prof_data_start
0c000aa0 __TI_tls_block_size
0c000740 __TI_tls_init
0c000ae0 __TI_tls_main_thread_base
0c0005a0 __TI_zero_init
ffffffff __binit__
0c0009c0 __c6xabi_get_addr
0c000ac0 __c6xabi_get_tp
ffffffff __c_args__
0c000980 _args_main
0c0003a0 _auto_init_elf
0c0008a0 _c_int00
0c000210 _cleanup_ptr
0c000214 _dtors_ptr
0c000b00 _stack
0c000a00 abort
ffffffff binit
0c0004a0 copy_in
0c000000 emif4Cfg
0c000680 exit
0c000a80 main
0c000800 memcpy
GLOBAL SYMBOLS: SORTED BY Symbol Address
address name
-------- ----
00000000 __TI_STATIC_BASE
00000001 __TI_args_main
00000400 __TI_STACK_SIZE
0c000000 emif4Cfg
0c000210 _cleanup_ptr
0c000214 _dtors_ptr
0c000218 __TI_enable_exit_profile_output
0c0003a0 _auto_init_elf
0c0004a0 copy_in
0c0005a0 __TI_zero_init
0c000680 exit
0c000740 __TI_tls_init
0c000800 memcpy
0c0008a0 _c_int00
0c000920 __TI_cpp_init
0c000980 _args_main
0c0009c0 __c6xabi_get_addr
0c000a00 C$$EXIT
0c000a00 abort
0c000a20 __TI_decompress_none
0c000a40 __TI_decompress_rle24
0c000a60 __TI_decompress_rle
0c000a80 main
0c000aa0 __TI_tls_block_size
0c000ac0 __c6xabi_get_tp
0c000ae0 __TI_tls_main_thread_base
0c000b00 _stack
0c000f00 __TI_STACK_END
0c000f10 __TI_Handler_Table_Base
0c000f18 __TI_CINIT_Base
0c000f18 __TI_Handler_Table_Limit
0c000f20 __TI_CINIT_Limit
ffffffff __TI_pprof_out_hndl
ffffffff __TI_prof_data_size
ffffffff __TI_prof_data_start
ffffffff __binit__
ffffffff __c_args__
ffffffff binit
UNDEFED __TI_INITARRAY_Base
UNDEFED __TI_INITARRAY_Limit
UNDEFED __TI_TLS_BLOCK_SIZE
UNDEFED __TI_TLS_INIT_Base
UNDEFED __TI_TLS_INIT_Limit
UNDEFED __TI_TLS_MAIN_THREAD_Base
[44 symbols]
spiboot.out
-a
-boot
-e _c_int00
-order L
ROMS
{
ROM1: org = 0x0400, length = 0x1000000, memwidth = 32, romwidth = 32
files = { spiboot.btbl }
}
Hi Rahul,
I followed the ReadMe.txt and here is the contents of 0x8000000.
I can see loading of SPI bus on my prototype board. But cannot see that on EVM.
I did make the change from 0x51 to 00. I am very puzzled. Can't wait for the webex.
Regards,
Steve
Hi Rahul,
I am attaching the memory display of address 0x8FFF00 with app.bin file. The data is kind correct except the mode (both 1 or 2 works), but the endianness is not matching.
Thank you.
Regards,
Steve
Hi Steve,
Were you able to confirm with your hardware engineers that the reference clock on your custom board matches to the 100MHz CORE_CLK ? I am attaching a snapshot of the schematics for Gauss EVM.
We suspect that your PLL settings may be overdriving the chip so we need to know the value of the reference clock on your board. As an experiment can you chnage the value at offset 0x08 in the boot image from 0x4020_0002 to 0000_0000 to not change the PLL, and change the device frequency set from offset 0x18 from 0x3e8 to 0x138 to have the boot ROM read the boot image at the same speed that it read the boot parameter table (which seems to be working).
Regards,
Rahul
Hi Rahul,
Thanks for the reply. There are quite a few issues here. I am going to answer one by one.
1) The 80 bytes at address 0x008FFF00 is the same in EVM and my prototype board. So I think it is correct.
2) My hardware engineers is in the process of checking PLL out. I have forwarded your post to them, and will keep you posted on the result.
3) romparse utility crashed without post any message.
Did you find why location 0x008FFFFC is not _c_int00 address?
Thank you.
Regards,
Steve
Hi Rahul,
We measured SYSCLKOUTs from EVM and our prototype board. The output frequencies are the same.
probe 1 is EVM and probe 2 is our board.
