Hi all,
It's about RESET and DEVSTAT latching.
Look, the datasheet :for hard reset and soft reset,the DEVSTAT pins are not re-latched. and the boot mode field is writable(I have verified), so I can
modify the boot configuration field in DEVSTAT,and then trig the reset by writing the RSTCTL and RSTCFG register.
But i found the DEVSTAT is still re-latched after both hard or soft reset ! It is not acting as the Datasheet descripts.
Can you tell me why?
===================
Here is my code, Please point out my mistakes? Thank you in advance!
{
...
...
CSL_BootCfgUnlockKicker();
/***************MODIFY DEVSTAT*******************************************/
//modify DEVSTAT for next re-Boot
volatile uint32 *RegPtr;
RegPtr = (volatile uint32*)0x02620020;
*RegPtr = 0x0003964D; //on POR the value is latched as 0x0003960D
/***************BELOW FOR RESET******************************************/
//RSTCTL Key
RegPtr = (volatile uint32*)0x023100E8;
*RegPtr ^= 0x00005A6A;
//RSTCFG set softreset
RegPtr = (volatile uint32*)0x023100EC;
*RegPtr |= 0x00003000;//also tried hard reset,the value will be 0x00000000
//RSTCTL Key
RegPtr = (volatile uint32*)0x023100E8;
*RegPtr ^= 0x00005A6A;
//RSTCFG trig softreset
RegPtr = (uint32*)0x023100E8;
*RegPtr &= 0xFFFEFFFF;// sadly, after reset ,the DEVSTAT re-latched to value 0x0003960D
CSL_BootCfgLockKicker();
...
...
}
PS:
[ Here is the background thread: C6670 SPI boot from another NOR FLASH address,how?
Because the GPIO pin level is fixed on the hardware, so I have to try this method here I mentioned above.]