How to configure da850evm.h File for DDR2

Hi,

Q1) Do you have emulator with you?

Q2) Have you tried to bringup the custom board (RAM) using CCS gel file?

Q3) Where did you downloaded the AM18xx SDK?

Your u-boot config files seems to be old in which you shared early

Could you please attach the u-boot config file located at include/configs/da850evm.h

Please confirm to answer the further questions.

Connect any TI / SDI emulator on your board and confirm by loading CCS gel files and try to running examples

http://processors.wiki.ti.com/index.php/OMAP-L138_Hardware_Design_Guide

Thanks for your understanding.

Q1) Do you have emulator with you?

Ans. Yes i have a JTAG emulator .

Q2) Have you tried to bringup the custom board (RAM) using CCS gel file?

Ans. I have tried to add .GEL file of AM1808 using CCS, but when i try to load it on my board, CCS gives an error.

Q3) Where did you downloaded the AM18xx SDK?

Ans. http://software-dl.ti.com/sitara_linux/esd/AM180xSDK/latest/exports//am180x-evm-sdk-src-06.00.00.00.tar.gz

Your u-boot config files seems to be old in which you shared early

Where can i find the latest file ?

Could you please attach the u-boot config file located at include/configs/da850evm.h

7041.da850evm.h

Please confirm to answer the further questions.

Connect any TI / SDI emulator on your board and confirm by loading CCS gel files and try to running examples

How can i try Running examples on the board ? I am able to connect the board to CCS, but unable to Load .GEL files

Hi Taqi,

Thanks for your answers,

Ans. Yes i have a JTAG emulator .

What is the name of JTAG emulator (TI or Spectrum digital)?

Ans. I have tried to add .GEL file of AM1808 using CCS, but when i try to load it on my board, CCS gives an error.

What type of error are you facing?

Have you selected your board (AM1808) name and emulator name while connecting to the board ?

Useful TI wikis for facing connection errors between CCS to emulator,

http://processors.wiki.ti.com/index.php/How_to_connect_to_the_OMAP-L138/C6748/AM1808_EVM_board_using_CCS%3F#Connection_errors_using_CCSv4_and_XDS100

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_ccstudio/CCSv4/Demos/ccs4-setup1_b5.htm

http://processors.wiki.ti.com/index.php/Quick_Tips#Target_Setup

http://processors.wiki.ti.com/index.php/Target_Configuration_-_Custom_Configurations

http://processors.wiki.ti.com/index.php/GSG:Adding_GEL_files_to_a_target_configuration

Where can i find the latest file ?

You can also download OMAPL138 TI SDK source for AM18xx,

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/dvsdk/DVSDK_4_00/latest/index_FDS.html

http://software-dl-1.ti.com/dsps/forms/self_cert_export.html?prod_no=dvsdk_omapl138-evm_04_03_00_06_setuplinux&ref_url=http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/dvsdk/DVSDK_4_00/latest/

How can i try Running examples on the board ? I am able to connect the board to CCS, but unable to Load .GEL files

If you are able to connect target through emulator, after that only you can load any examples.

It will also ensure that the hardware is good,

What is the name of JTAG emulator (TI or Spectrum digital)?

Ans. Its Part No is BH-Usb 100v2 from Black Hawk

If you are able to connect target through emulator, after that only you can load any examples.

I am able to connect to AM1808 using JTAG, what steps should i do to check whether my hardware works fine or not ?

This is the error i receive, when i try to Load NAND-Writer.out file 

You can also download OMAPL138 TI SDK source for AM18xx,

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/dvsdk/DVSDK_4_00/latest/index_FDS.html

http://software-dl-1.ti.com/dsps/forms/self_cert_export.html?prod_no=dvsdk_omapl138-evm_04_03_00_06_setuplinux&ref_url=http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/dvsdk/DVSDK_4_00/latest/

Both of these Links are broken

Hi Taqi,

This error looks like linker.cmd issue,

Are you build this .out file yourself or pre-built one?

You need to build this nand-writer source project according to your memory mapping through linker.cmd file.

mean while download OMAPL138 TI SDK and try to modify the u-boot config .h file for DDR2 timing parameters.

Are you build this .out file yourself or pre-built one?

Ans. I have build this file using CCS4.

You need to build this nand-writer source project according to your memory mapping through linker.cmd file.

Where can i find the linker.cmd file ?

mean while download OMAPL138 TI SDK and try to modify the u-boot config .h file for DDR2 timing parameters.

The link you gave me are broken, both of them. Can you recheck the link ?

Hi,

Where can i find the linker.cmd file ?

Suppose, If you not finding exact "linker.cmd" name then try *.cmd (any cmd file)

The link you gave me are broken, both of them. Can you recheck the link ?

Try to install "dvsdk_omapl138-evm_04_03_00_06_setuplinux"

http://www.ti.com/tool/linuxsdk-omapl138

http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/dvsdk/DVSDK_4_00/latest/index_FDS.html

http://software-dl.ti.com/dsps/dsps_public_sw/c6000/web/omapl138_lcdk_sdk/latest/index_FDS.html

Linker.cmd

/*
 * TI Booting and Flashing Utilities
 *
 * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation version 2.
 *
 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 * kind, whether express or implied; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

-lrts32e.lib
-stack          0x00008000 /* Stack Size */  
-heap           0x00008000 /* Heap Size */

MEMORY
{
  DRAM        org=0xC0000000 len=0x01000000 /* DDR RAM */
  DRAM_PROG   org=0xc1000000 len=0x01000000 /* DDR for program */
  AEMIF       org=0x62000000 len=0x01000000 /* AEMIF CS2 region */
}

SECTIONS
{
  .text :
  {
  } > DRAM_PROG
  .const :
  {
  } > DRAM_PROG
  .bss :
  {
  } > DRAM_PROG
  .stack :
  {
  } > DRAM_PROG
  .data :
  {
  } > DRAM_PROG
  .cinit :
  {
  } > DRAM_PROG
  .sysmem :
  {
  } > DRAM_PROG
  .cio :
  {
  } > DRAM_PROG
  .aemif_mem :
  {
  } > AEMIF
  .ddrram     :
  {
  } > DRAM, RUN_START(DDRStart)
}

This is my linker.cmd file

i think the problem is with the RAM, if i change it or remove it. will it work then ?

Hi,

I think, without RAM you can't,

If you dont have RAM  then where you will execute the application?

Where did you download this nand writer project?

Whether it is belongs to AM18x ?

Download starterware package for AM18xx and build it then load to your board through emulator.

http://processors.wiki.ti.com/index.php/StarterWare

http://software-dl.ti.com/dsps/dsps_public_sw/am_bu/starterware/01_00/index_FDS.html

http://processors.wiki.ti.com/index.php/StarterWare_Getting_Started_01.00.XX.XX

http://processors.wiki.ti.com/index.php/StarterWare_01.00.01.01_User_Guide

You didn't gave me the source code of SDK file in which da850evm_config exist ?

How to open this file in linux ?

Hi,

Please go through the inux basics commands to learn for embedded linux developments.

Meanwhile try to run starterware example codes on your custom board with proper AM18xx CCS projects.

Hi Titus,

i have modified the da850evm.h header file according to the my board setting, i.e. defining the NAND and un-defining the SPI Flash. Then i have created the u-boot.bin file as you told me to. And created the Uboot.ais image file using AISgen tool.

Now can you please tell me, how can i send the Files related to LINUX OS using Ethernet cable, or if there is any other simple way, then please share it here as well.

And also, on Mar 19, 2014 12:26 PM you ask me to modify the PLL and DDR configuration. Should i just leave it or am i suppose to change it, because i can't find it any where.

For DDR & PLL config,

/*
 * PLL configuration
 */
#define CONFIG_SYS_DV_CLKMODE          0
#define CONFIG_SYS_DA850_PLL0_POSTDIV  1
#define CONFIG_SYS_DA850_PLL0_PLLDIV1  0x8000
#define CONFIG_SYS_DA850_PLL0_PLLDIV2  0x8001
#define CONFIG_SYS_DA850_PLL0_PLLDIV3  0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV4  0x8003
#define CONFIG_SYS_DA850_PLL0_PLLDIV5  0x8002
#define CONFIG_SYS_DA850_PLL0_PLLDIV6  CONFIG_SYS_DA850_PLL0_PLLDIV1
#define CONFIG_SYS_DA850_PLL0_PLLDIV7  0x8005

#define CONFIG_SYS_DA850_PLL1_POSTDIV  1
#define CONFIG_SYS_DA850_PLL1_PLLDIV1  0x8000
#define CONFIG_SYS_DA850_PLL1_PLLDIV2  0x8001
#define CONFIG_SYS_DA850_PLL1_PLLDIV3  0x8003

#define CONFIG_SYS_DA850_PLL0_PLLM     24
#define CONFIG_SYS_DA850_PLL1_PLLM     21

/*
 * DDR2 memory configuration
 */
#define CONFIG_SYS_DA850_DDR2_DDRPHYCR (DV_DDR_PHY_PWRDNEN | \
                    DV_DDR_PHY_EXT_STRBEN | \
                    (0x4 << DV_DDR_PHY_RD_LATENCY_SHIFT))

#define CONFIG_SYS_DA850_DDR2_SDBCR (        \
    (1 << DV_DDR_SDCR_MSDRAMEN_SHIFT) |    \
    (1 << DV_DDR_SDCR_DDREN_SHIFT) |    \
    (1 << DV_DDR_SDCR_SDRAMEN_SHIFT) |    \
    (1 << DV_DDR_SDCR_BUS_WIDTH_SHIFT) |    \
    (0x3 << DV_DDR_SDCR_CL_SHIFT) |        \
    (0x2 << DV_DDR_SDCR_IBANK_SHIFT) |    \
    (0x2 << DV_DDR_SDCR_PAGESIZE_SHIFT))

/* SDBCR2 is only used if IBANK_POS bit in SDBCR is set */
#define CONFIG_SYS_DA850_DDR2_SDBCR2 0

#define CONFIG_SYS_DA850_DDR2_SDTIMR (        \
    (14 << DV_DDR_SDTMR1_RFC_SHIFT) |    \
    (2 << DV_DDR_SDTMR1_RP_SHIFT) |        \
    (2 << DV_DDR_SDTMR1_RCD_SHIFT) |    \
    (1 << DV_DDR_SDTMR1_WR_SHIFT) |        \
    (5 << DV_DDR_SDTMR1_RAS_SHIFT) |    \
    (8 << DV_DDR_SDTMR1_RC_SHIFT) |        \
    (1 << DV_DDR_SDTMR1_RRD_SHIFT) |    \
    (0 << DV_DDR_SDTMR1_WTR_SHIFT))

#define CONFIG_SYS_DA850_DDR2_SDTIMR2 (        \
    (7 << DV_DDR_SDTMR2_RASMAX_SHIFT) |    \
    (0 << DV_DDR_SDTMR2_XP_SHIFT) |        \
    (0 << DV_DDR_SDTMR2_ODT_SHIFT) |    \
    (17 << DV_DDR_SDTMR2_XSNR_SHIFT) |    \
    (199 << DV_DDR_SDTMR2_XSRD_SHIFT) |    \
    (0 << DV_DDR_SDTMR2_RTP_SHIFT) |    \
    (0 << DV_DDR_SDTMR2_CKE_SHIFT))

#define CONFIG_SYS_DA850_DDR2_SDRCR    0x00000494
#define CONFIG_SYS_DA850_DDR2_PBBPR    0x30

Regards

Hi,

you ask me to modify the PLL and DDR configuration. Should i just leave it or am i suppose to change it, because i can't find it any where.

As of now, Leave it those changes,

Do you have serial port & NAND flash?

If yes,

Flash "u-boot.ais" file into NAND flash through serial flash utility.

http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138

First try, erase command for erasing NAND flash.

..\sfh_OMAP-L138.exe -erase -flashType NAND -targetType AM1808

Tell me that the erase command how it goes.

If you face any issues while using this tool please refer the ti wiki link to change the settings to your custom board.

http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138#Modifications_for_Custom_Boards

You mean i flash image using UART Host ?

Both of the links are giving error

http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138#Modifications_for_Custom_Boards

http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138#Serial_Flasher_Options

Hi,

You mean i flash image using UART Host ?

No, It is serial flash utility and not UART host,

Please read the docs & TI wikis carefully.

UART host means, It will load the u-boot.ais (It should be configured as UART boot mode in AISGen tool while converting u-boot.bin to AIS format) ) to RAM directly instead of flashing, It wont exist after restart the board.