• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 1468 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

How to disable cache on shared RAM?

Hoffiz
Expert 1670 points

Hi,

I have two projects for the omapl137. One on the DSP and one on the ARM side. I've created my own IPC (just a simple shared memory location) where the DSP and ARM communicate.

I created 3 memory segments:

IPC...

I have configured them as io (assuming this will disable caching). A very similar platform is created for the ARM side. My code only runs if I call: Cache_wb and Cache_inv accordingly in the right places.

I don't have a need for this memory segments to be cached and have tried the following with the intent of disabling cache:

  1. set L2, L1D, and L1P Cache to 0
  2. remove cache module from sys/bios

My question:

  1. How, if possible, do I disable caching for a section of the shared memory on both the arm and the dsp in sys/bios?

  • 0
    TI__Mastermind 35645 points

    Hi,

    Thanks for your post.

    May be, there would be an option to put the shared region in external memory and make change the MAR bit for that particular region to be non-cacheable.

    You have privilege to control whether the external memory addresses are cacheable or non-cacheable through Memory attribute register (MAR) bits (0 = noncacheable, 1 = cacheable). The memory attribute registers are documented in TMS320C674x DSP Megamodule Reference Guide (SPRUFK5). You shall enable caching for the external memory through CSL function CACHE_enableCaching. For more details. please refer Section 2.3 in the c674x cache user guide doc. as mentioned below:

    May be, you shall check all possible cache configurations for C674x devices with 2048K bytes in the c674x DSP cache user guide as given below:

    http://www.ti.com/lit/ug/sprug82a/sprug82a.pdf

    Thanks & regards,

    Sivaraj K

    -------------------------------------------------------------------------------------------------------

    Please click the Verify Answer button on this post if it answers your question.

    --------------------------------------------------------------------------------------------------------