Hi,
We are using beaglebone black based custom board,
We have interfaced external RTC with SPI0
SPI0 has two slaves attached to it one is EEPROM and other is RTC.
RTC is DS3234, We are using linux 3.8, i enabled ds3234 support in the kernel
I changed the device tree as follows
spi0_pins: pinmux_spi0_pins{
pinctrl-single,pins = <
0x150 0x30 /* spi0_sclk, INPUT_PULLUP | MODE0 */
0x154 0x10 /* spi0_d0, OUTPUT_PULLUP | MODE0 */
0x158 0x30 /* spi0_d1, INPUT_PULLUP | MODE0 */
/* For EEPROM */
0x15c 0x10 /* spi0_cs0, OUTPUT_PULLUP | MODE0 */
/* For RTC */
0x160 0x10 /* spi0_cs1, OUTPUT_PULLUP | MODE0 */
>;
};
&spi0{
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
/* DO is MOSI, D1 is MISO */
ti,pindir-d0-out-d1-in = <1>;
spidev {
compatible = "spidev";
/* We use SPI CS 0; register the same */
reg = <0>;
spi-max-frequency = <1000000>;
spi-cs-high;
/* Operate with CPOL and CPHA set to zero */
/* spi-cpol; */
/* spi-cpha; */
};
rtc: ds3234@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "dallas,ds3234";
reg = <1>; /* Indicated SPI chip select number*/
/* Below settings might need to be twea*/
/*spi-max-frequency = <1000000000>;*/
/* spi-cpol; */
/* spi-cpha; */
};
};
With this setting i am not able to sync system time with hardware clock time and vice versa.
When i used hwclock i am getting following error
# hwclock hwclock: RTC_RD_TIME: Invalid argument # hwclock -w hwclock: RTC_SET_TIME: Invalid argument # date -s "2014-9-25 18:42" Thu Sep 25 18:42:00 EDT 2014 # hwclock -w # # # # hwclock hwclock: RTC_RD_TIME: Invalid argument
Here is the kernel log output of spi and rtc debug message at booting time
# dmesg | grep -i spi [ 0.455453] omap2_mcspi 48030000.spi: registered master spi1 [ 0.456706] spi spi1.0: setup: speed 750000, sample leading edge, clk normal [ 0.456736] spi spi1.0: setup mode 0, cs_high, 8 bits/w, 1000000 Hz max --> 0 [ 0.457149] omap2_mcspi 48030000.spi: registered child spi1.0 [ 0.457856] spi spi1.1: setup: speed 48000000, sample leading edge, clk normal [ 0.457885] spi spi1.1: setup mode 0, 8 bits/w, 1000000000 Hz max --> 0 [ 0.458053] omap2_mcspi 48030000.spi: registered child spi1.1 [ 0.461173] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461209] ds3234 spi1.1: setup mode 3, 8 bits/w, 1000000000 Hz max --> 0 [ 0.461293] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461322] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461347] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461440] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461466] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461491] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461553] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461579] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461638] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461664] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461688] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461746] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461773] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461830] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461856] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461880] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461917] ds3234 spi1.1: Control Reg: 0xff [ 0.461959] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.461985] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.462009] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.462046] ds3234 spi1.1: Ctrl/Stat Reg: 0xff [ 0.462123] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.462251] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.462284] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 0.462672] ds3234 spi1.1: rtc core: registered ds3234 as rtc0 [ 1.752118] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 1.752150] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 1.752181] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 1.752231] ds3234 spi1.1: hctosys: unable to read the hardware clock [ 2.481498] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 2.481538] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 2.481570] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 7.755855] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 7.755918] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 7.756241] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 7.756306] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 7.761629] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 7.761689] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 8.416463] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 8.416527] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 8.416576] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 8.579711] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 8.579773] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 8.579822] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 9.259539] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 9.259602] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 9.259651] spidev spi1.0: setup: speed 750000, sample leading edge, clk normal [ 16.791312] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 16.791352] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted [ 16.791383] ds3234 spi1.1: setup: speed 48000000, sample trailing edge, clk inverted
Any pointers/suggestions for solving this ?
Thank you,
Regards,
Ankur
