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DP83869HM: Speed optimization error

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869

Hi Team,

I have a question about DP83869HM speed optimization.
I described problem below but could you help how to address this speed optimization problem?

[Problem]
Speed optimization is enabled so ideally Phy detects 100M cable and fall back to 100M speed after 1000M link establishment attempt(default 4 times).
However, there is connection error like below.
- some hubs establish 100M connection at startup but after cable disconnect/ connect, Phy no longer establish connection(no data communication).
- some hubs cannot establish 100M connection at all(no data communication).

[Test condition]
- 1000M PHY in Auto-Negotiation
- 2 twisted pairs
- set Address 0x14 bit[9]=1

[register information]
Read register
- Address 0x5 = CDE1
- Address 0xA = 0800
- Address 0x11 bit[7] speed_opt_status = 0

Full address

0x 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
0x 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F
(Startup)                                
  1140 796D 2000 A0F1 01E1 CDE1 006D 2001 6001 0200 0000 0000 0000 401F 0040 F000
  5048 6C02 0000 0000 29C7 0000 0000 0040 6150 4444 0002 0000 0000 0000 0012 0000
(after cable disconnect/ connect)                                
  1140 796D 2000 A0F1 01E1 CDE1 006D 2001 6001 0200 0800 0000 0000 401F 0040 F000
  5048 6F02 0000 0000 29C7 0000 0000 0040 6150 4444 0002 0000 0000 0000 0012 0000
(set Address 0x14 bit[9]=1)                                
  1140 796D 2000 A0F1 01E1 CDE1 006D 2001 5806 0200 0800 0000 0000 401F 0040 F000
  5048 6C02 0000 0000 2BC7 0000 0000 0040 6150 4444 0002 0000 0000 0000 0012 0000

Regards,

Kai

  • Hi Kai,

    I do not think speed optimization should be causing the issue that you are currently seeing. From the registers, it seems that link is being established, but you stated that you get no data communication. Can you try the following experiments?

    1. Set the PHY in reverse loopback mode. Send data from the link partner to the PHY through the cable and see if you get the same data back.
    2. Set the PHY in MII loopback mode. Send data from the MAC to the PHY and see if you get the same data back.
    3. Perform an external loopback by wiring the transmit pins to the receive pins on the MDI side. Send data from the MAC to the PHY and see if you get the same data back.

    More information on loopback modes can be found in section 9.3.4 of the datasheet. Let me know the results of these experiments.

    Regards,

    Adrian Kam


  • Hi Adrian,

    sure, I will feedback to you once I get #1/2/3 results.

    However, it takes a little bit time to modify software so if we have any general debug material related with this problem, could you share it with me?
    Also defult SPEED_OPT_ENHANCED_EN bit[8] = 1 but when we set SPEED_OPT_EN bit[9] = 1, we should keep bit[8] = 1?

    Regards,
    Kai

  • Hi Kai,

    1. We do not have any general debug app note for the DP83869. Since the registers show that you have link established, but no data communication, the loopback modes are currently the best options for debug, as it will help determine if the communication issue is from the MAC side or MDI side.
    2. You can keep bit[8]=1. You can try changing it to 0, but I do not think that bit configuration is causing the issue that you are seeing.

    I look forward to the results.

    Regards,

    Adrian Kam

  • Hi Kam,

    We found this error was occurred at high level layer so DP83869HM doesn't have any problem.
    I got one more question about speed optimization so I will post new e2e.

    Regards,
    Kai