Hi,
For our application we need to use the GPIO to conftol the power delivery options to acheive:
1) a gradual power ramp from 5W to 45W in 5W increment.
2) A gradual decrement power ramp from 45W to 5W in 5W Decrement.
* Power connection must be persistant trought time. Meaning that the power delivery can not be stopped suring the positive or negative power ramp.
The question is: How can we setup the TPS to acheive that goal?
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Is this a solution( I dont see any additional info about that functionality):
I see this in the TPS65987D GPIO Events (Rev. A) P.2:
| msb | lsb | ||||||
| TT3 | TT2 | TT1 | PDO MODE | V | I | Power | step |
| 0 | 0 | 0 | 0 | 5 | 1 | 5 | 5 |
| 0 | 0 | 1 | 1 | 5 | 2 | 10 | 5 |
| 0 | 1 | 0 | 2 | 9,55 | 1,5 | 14,325 | 4,325 |
| 0 | 1 | 1 | 3 | 9,55 | 2 | 19,1 | 4,775 |
| 1 | 0 | 0 | 4 | 9,55 | 2,5 | 23,875 | 4,775 |
| 1 | 0 | 1 | 5 | 15 | 2 | 30 | 6,125 |
| 1 | 1 | 0 | 6 | 15 | 2,5 | 37,5 | 7,5 |
| 1 | 1 | 1 | 7 | 15 | 3 | 45 | 7,5 |
"Port 0 Source PDO Negotiated TT 1 Port 0 Source PDO Negotiated TT 2 Port 0 Source PDO Negotiated TT 3 Input High These 3 Events combine to form a 3-bit truth table to allow digital outputs indicating the active state of up to 7 PDOs. TT 3 is the most-significant bit (MSB) and TT 1 is the least significant bit (LSB)."
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Please sugggest a solution that meet our requirement.
A .pjt file configured for your solution suggestion for the TPS65987D costumization tool would be great.
The GPIO that are:
| GPIO2 |
| GPIO5 |
| GPIO6 |
| GPIO7 |
Thank you for your help.
If you would like, we can setup a call to talk more in depth about it.
here is my email :
samuel.cyr@gphy.ca
