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Hi
What's the difference between SN65LVPE504 ( PCIE Gen2 Limited redriver ) and DS160PR410 ( Linear Redriver ) ?
If our situation was Root Port ( Gen3 ) to End Device ( Gen 2 ) , which one suit our application ?
Thanks
Hi Gareth,
DS160PR410 is one of the latest PCIe linear redrivers. This part has linearity and bandwidth for up to PCIe Gen4. For PCIe Gen3 and 4 the recommendation is to consider using DS160PR410. Also, this device is already on the PCIe integrator list - meaning it has passed all PCIe protocol requirements.
Regards,,Nasser
Hi Nasser
The source root port is GEN3 But the device is GEN2 Which one is recommended
Hi Gareth,
Since end point is Gen2, you can use LVPE504. PR410 provides future upgrade platform as needed. But for this application, LVPE504 does the job as well.
Regards,,Nasser
Hi Gareth,
LVPE504 is a mature product and data sheet is the only document that i am aware of. Also, please note DS50PCI401/402 have the same functionality. If you like, you can take a look at the EVM schematic of this part for guidance. Please below note a link to this part's EVM:
Regards,,Nasser
Hi Nasser
1Because the customer's application is GEN3 as the source and GEN2 as the device, is it recommended to use GEN2 or GEN3 linear redriver?
1-1. As shown in the figure below, if the source is GEN3, will the linear redriver come out GEN3 after GEN3? Then it will become GEN2 after communicating with the device? (Is that right?)
1-2. As shown in the figure below, if the source is GEN3 after GEN2 linear redriver comes out, will it become GEN2? (Is that right?)
2.DS50PCI402 this one is recommended? We see Fengyun can put a can simultaneously use both X4 lane two-way
3. Ask whether DS50PCI402 and DS80PCI402 are pin to pin? The difference is only in GEN2 and GEN3?
4. Is there any GEN2 linear redriver?
Hi Gareth,
LVPE504 or DS50PCI402 are phy layer 0 devices. Meaning they provide electrical interface to the transmission media. In PCIe applications root port and device on far right hand side of your block diagram negotiate data rate. LVPE504 or DS50PCI402 are same as analog buffer and do not participate in these negotiation. LVPE504 and DS50 are transparent to these negotiations.
In your block diagram above, after the PCIe protocol negotiation, there could be either Gen2 or Gen1 final data rate.
There are pin differences between DS50 and DS80 devices. Please note pins 24 through 27.
Linear redrivers are mainly targeted for PCIe Gen3 and higher. Please note PCIe Gen3 linear redrivers like DS160PR410 are also used for Gen2 applications as well.
Regards,,Nasser
Hi Nasser
DS50PCI401 addition evm schematic, there are other references schematic it?
Hi Gareth,
Not at the moment. We can review your schematic when yours is ready.
Regards,,Nasser