Please tell us about Figure 11 of the data sheet.
In the data sheet, when the total input current is 0, the output current is not 0.
How much output current can flow when the total input current is 0?
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Please tell us about Figure 11 of the data sheet.
In the data sheet, when the total input current is 0, the output current is not 0.
How much output current can flow when the total input current is 0?
It looks like the input bias current for each LVDS input can be 20uA max. I would think that this would cause an output current of 3mA or 6mA for respectively for a gain of 150 or 300. This is not a high speed amplifier so I will reassign the thread to the interface team.
Hello Satou-san,
This output current you are seeing in this figure is due to the quiescent current of the device (33mA typical). Please note the output stage configuration:
Best regards,
Hasan Babiker