Hi Team,
Q1. If the pixel clock into the US947-Q1 is 76.2MHz for example, FPD Link frequency becomes 76.2MHz x 35, correct?
Q2. Are there any chance that FPD Link frequency becomes 76.2MHz x 21?
Thank you.
Regards,
Hirata
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Hi Team,
Q1. If the pixel clock into the US947-Q1 is 76.2MHz for example, FPD Link frequency becomes 76.2MHz x 35, correct?
Q2. Are there any chance that FPD Link frequency becomes 76.2MHz x 21?
Thank you.
Regards,
Hirata
Hello Akihiro,
For the 947, it depends on if you are operating in single FPD or dual FPD mode. In single mode, the FPD rate will be PCLK*35. For dual FPD mode, the rate will be PCLK*35/2 for each FPD lane.
PCLK*21 is not a supported rate
Best Regards,
Casey
Casey-san,
Let me check.
The portion that Single FPD mode run at PCLK x 35 is below, correct?
The portion that dual FPD mode run at PCLK x 35/2 is below, correct?
If there is other portion that describes better, I would like to know where it is.
Thank you.
Regards,
Hirata