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lmk01801 issue

Other Parts Discussed in Thread: LMK01801

I am using lmk01801 and my requirement is output clock divided by 1(i.e input 50Mhz and generate Output also 50Mhz ), and divided by 60(i.e input 50Mhz and generate Output is divided by 60 ) so please can you implement the VHDL program for this ic?