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TCAN4551-Q1: Setting the CCCR.INIT bit for Bus-off recovery

Ed Goldstein
Prodigy 80 points
Part Number: TCAN4551-Q1


If I understood the data sheet correctly, once I get a bus-off, I have to clear CCCR.INIT before it will start the recovery sequence.

What is the best way to set this bit? I see in the demonstration firmware functions like TCAN4x5x_MCAN_DisableProtectedRegisters that they read the register first, change bits, then take up to 5 retries to set and read back/confirm the register.

Is this really necessary? or is that only for enabling writing to protected registers.

Thanks in advance.

  • +1
    TI__Guru 53575 points

    Hi Ed,

    Attempting to write to and verify these bits multiple times is done to ensure there is no condition present that is keeping the bits set in a different state. For instance, if the fault that caused the interrupt bit to be set is still present while the CPU attempts to clear it, the attempted clear will fail indicating that the device cannot return to normal operation at this time. Multiple attempts at this write gives the system time to recover from the fault (useful if it's waiting for a dominant timeout timer to trigger) or if the system is in a non-recoverable state (bus is shorted into dominant state for extended period). If a function such as TCAN4x5x_MCAN_DisableProtectedRegisters returns a fail status, it can be assumed that the system has failed to recover within the time allotted for failsafe measures to resolve the fault. 

    Let me know if you have any more questions.

    Regards,
    Eric Schott