SN65DPHY440SS: Software I2C controlled Reset for IC

Anand Krishnan M1

Prodigy 140 points

Part Number: SN65DPHY440SS

Hi Team,

Myself Anand.

This is our use case for the Redriver.

Please find below the queries :-

1. From the datasheet I understood that IC has Hardware reset. My question is there any option for resetting the IC via I2C.

2. We have connected the Redriver between Camera sensor and Processor. If the Redriver IC is in active state ( Reset = HIGH ) and Camera stream is not coming to Redriver input, will the output pins of Redriver go to some undefined state causing processor to trigger false inputs ?

over 4 years ago

0 David (ASIC) Liu over 4 years ago

TI__Guru**** 176851 points

Hi, Anand

1. There is no resetting the DPHY440 through the I2C register.

2. When camera is not streaming data to the DPHY440, does the camera go into the LP00 state?

Thanks

David

0 Anand Krishnan M1 over 4 years ago in reply to David (ASIC) Liu

Prodigy 140 points

Hi David,

1. Its clear.

2. Please consider that Camera is in Reset condition.

0 David (ASIC) Liu over 4 years ago in reply to Anand Krishnan M1

TI__Guru**** 176851 points

Hi, Anand

With camera in reset condition, do you know if it is driving a LP00 condition on the bus? If it is, then the DPHY440 will also drive LP00 on its output.

Thanks

David

0 Anand Krishnan M1 over 4 years ago in reply to David (ASIC) Liu

Prodigy 140 points

Hi David,

Ok noted.

Is it possible to connect the lanes in an order ? Like MIPI D0 line to IC Pin D3 for easiness of layout routing

0 David (ASIC) Liu over 4 years ago in reply to Anand Krishnan M1

TI__Guru**** 176851 points

Hi, Anand

For DSI, DPHY440’s lane 0 is the only lane that supports the back channel. For this reason, DPHY440 lane 0 must always be connected to lane 0 of GPU and panel.

For CSI, CSI-2 does not have a back channel path. Because of this, there is no requirement on lane ordering.

Thanks

David

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SN65DPHY440SS: Software I2C controlled Reset for IC