SN65HVD24: Issue is when TX is disabled

Hi Higa,

Thanks for the detailed explanation. Based on your description and the waveform, this does not sound like intended behavior. Event without the external biasing circuit, the internal failsafe for this device should switch the receiver output to a known state soon after the transmitter goes high-z (DE=L). However, it seems that some ringing or oscillations in the system after this high-z transition is causing the glitch pulse to occur. 

In the scope shots, were the probes for the A and B pins located on the Aside board or Bside board? Because the issue is occurring on the Bside receiver, it would be best to view the signal voltages as close to the receiving IC as possible. Based on the small oscillation we can see on the A and B lines in this scope shot, I suspect that ringing at the receiver crosses the low-level input threshold for a period of time, causing the R signal to change to L for a moment. 

Is it possible to share the biasing circuit used on the Bside? If this is a typical failsafe biasing implementation, sharing the resistor values may be sufficient. Please also share the location and value of all termination resistors in the system. 

Let me know if you have any more questions in the meantime. 

Regards,
Eric Schott

Thank you for your prompt reply.
I will check with the customer and feedback you.

Best regards,

Higa

Hi Eric-san

I got the information from my customer as the attached file.
Would you please give me your advice about it.

SN65HVD24.xlsx

Best regards,

Higa

Hi Higa-san,

Thank you for the detailed info in the attachment. 

The failsafe biasing circuit here looks good and should keep the bus state biased well above the 200mV threshold for RS-485. The differential seen on the waveform is very close to the theoretical offset here. I don't expect this R pin pulse to be caused by an issue in this circuit. 

Please help with some more info:

• Does this occur on every time that DE is disabled? If not, what is the frequency of occurrence of this R pulse? 
• Does this phenomenon appear to impact all units tested? Or does this appear to only occur with a particular device/board?
• How far apart are the nodes placed in this setup? How long is the cable? 
• Please confirm that the power supplies for both transceivers is stable during the test. 

Regards,
Eric Schott

Hi Eric-san

Thank you for your advice.

I've got the info regarding your request from my customer, so I will share it below;

• Does this occur on every time that DE is disabled? If not, what is the frequency of occurrence of this R pulse? 

            [Higa] Yes. This phenomenon occurs on every time that DE is disabled.

• Does this phenomenon appear to impact all units tested? Or does this appear to only occur with a particular device/board?

           [Higa] Yes. This phenomenon appears with all units.

• How far apart are the nodes placed in this setup? How long is the cable? 

           [Higa] They tested with 1m and 3m cable. This phenomenon occurs in both of them.

• Please confirm that the power supplies for both transceivers is stable during the test. 

          [Higa] They have confirmed that the two power supplies, A and B, are stable. Please check the waveform below;

Best regards,

Higa

Hello Eric-san

I would appreciate if you could give me your advice.

Best regards,

Higa

Higa-san,

Thank you for your patience on this one. What is the state of the RE on B-side when this occurs? And does this occur from B-side to A-side as well? I'm curious if this is only happening in one direction or if A and B are irrelevant.

Regards,

Eric Hackett 

Eric-san

RE on the B side is always L (enable) and DE is always L(disable).

Communication is only from A to B.
It does not communicate in the direction from B to A.

Best regards,

Higa

Higa-san,

Based on your data and description, it looks like the device is not behaving as intended. I'm not aware of any similar issues occurring with this device, so I'm interested to see how this behavior may change based on the characteristics of your system. As this issue appears consistently and is replicable in your setup, I'd like to see what modifications may reduce or eliminate the phenomenon. If possible, please help conduct the following tests to see what impact they may have on the R pulse.

• Test both nodes when the connection between them is direct (far less than 1m) to see if eliminating the small amount of ringing also stops the pulse.
• Change the values used for the external biasing circuit. Initially, I suspect decreasing the value of the biasing resistors or increasing the value of the termination resistor would help keep the idle voltage biased further outside of the thresholds. 
• Try replacing the transceiver with a similar RS-485 device such as THVD1450 to see if this stops the issue. If the issue persists, we can assume that the conditions of the system may not be compatible with RS-485 specifications. 

Regards,
Eric Schott

Hi Eric-san

I apologize for my late response.

• Test both nodes when the connection between them is direct (far less than 1m) to see if eliminating the small amount of ringing also stops the pulse.

　　　[Higa]

          My customer was unable to prepare the environment for testing and gave up.
　　　Therefore, they only confirmed the change in the value of the external bias circuit.

• Change the values used for the external biasing circuit. Initially, I suspect decreasing the value of the biasing resistors or increasing the value of the termination resistor would help keep the idle voltage biased further outside of the thresholds. 

　　　[Higa]

When the fail-safe bias resistance was changed from 330Ω to 220Ω without changing the terminating resistor, the offset voltage became 0.96V (measured value), and it was confirmed that the problem was cleared.

My customer has strong questions about:
In order for the receiving R output to be "Low", it must be Va-Vb> -0.2V or less, but why is it going to be Low otherwise?　　　　　　　　　　　　　　　　　
Why does the R output transition to Low even if it is not in the state of Va-Vb <-0.2V when ringing occurs?

Is it possible to explain these things?　　

• Try replacing the transceiver with a similar RS-485 device such as THVD1450 to see if this stops the issue. If the issue persists, we can assume that the conditions of the system may not be compatible with RS-485 specifications. 

　　　[Higa]

           No samples of other devices, including THVD1450, are currently available on the market. Therefore, it cannot be tested.

Best regards,

Higa

Hi Higa-san,

Thanks for looking into this. I definitely understand the supply situation makes some comparison testing tricky. 

Your description and understanding of the low-level threshold here is right. Based on the voltages we see on the oscilloscope, I agree that the low-level conditions do not appear to be met, therefore the pulse should not occur. However, the ringing may be more significant than we can see based on these scope shots. Depending on the location on the signal path, the amplitude of the ringing may be different. Even a few mm can be significant with high enough frequencies. Additionally, the relatively long probe cables can attenuate the ringing by the time it gets to the ADC in the scope. The result of all this is that the voltage at the receiver pins may in fact dip below this -0.2V differential that we can not probe without seeing an attenuated signal or modifying the ringing entirely (probe capacitance). 

I'm glad to hear that the fail-safe biasing resistor seems to have solved this issue. This would make sense to help in the above scenario so I agree that if the solution works, there's no need for further investigation. Let me know if there's any further development with this or similar questions. 

Regards,
Eric Schott

Hi Schott

I got the new information from my customer.

They got the SN65HVD22EVM and did additional validation.
When I connected the EVM instead of their board and checked if the same phenomenon occurred, the phenomenon did not reproduce.
The bias resistance is 1.2kohm. (Termination resistance is 100 ohm)
In addition, the phenomenon was reproduced by replacing the SN65HVD24 with this EVM.
There is a difference between the SN65HVD22 and 24 with and without the equalizer. Do you think this has an effect?

Please refer to the attached file for the waveform.

DATA by SN65HVD22EVM.xlsx

Best regards,

Higa

Hi Higa-san,

I'll review this new info and get back to you tomorrow. 

Regards,
Eric Schott

Hi Schott-san

Do you have any update?

Best regards,

Higa

Hello Schott-san

I was wondering if you have had a chance to look at the message?

Our customer enquired about this matter today.

Regards,

Higa

Hi Higa-san,

The Equalizer feature of SN65HVD24 increases the sensitivity of the receiver to help overcome the effect cable losses. However, amplifying the signal this way also amplifies noise that could cause such a glitch, decreasing the noise immunity of the device. It seems that the noise present in this system is large enough to cause this glitch when amplified internally by SN65HVD24, but not large enough when not amplified in SN65HVD22.

Is there a particular reason that the customer is using the equalizer feature of this device, or is it possible to switch to the device that does not appear to have this issue? Has the system been tested with the non-equalizer device to see if it eliminates the issue in a brauder test environment?

Regards,
Eric Schott

Hi Schott-san

I apologize for late response.

I was waiting for a response from my customer.
They adjusted the failsafe bias resistor to eliminate the problem.
However, they sent the waveform data because they were not sure if they were concerned about this result.
Is there anything you can give advice by looking at the waveform?
If you have any concerns, please point them out.

(Please refer to the attached excel file.)

SN65HVD24 waveform.xlsx

Best regards,

Higa

Hi Schott-san

I will report that it was successfully resolved with your kind support.

Thanks!

Regards,

Higa