This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65DPHY440SS: Usage questions

Part Number: SN65DPHY440SS

Hi,

We have some questions regarding how to use SN65DPHY440SS.

  1. Regarding the 5 pairs of data, can this chip compensate the length mismatch among them?
  2. If there's any impedance mismatch among these signals, can this chip compensate it?
  3. The input to this chip is C-PHY signals, and customer expect the output side to be D-PHY signals.  Should we add another C-PHY to D-PHY bridge IC to cover this besides SN65DPHY440SS?

Thanks,

Antony

  • Antony

    1. The DPHY440 implements a dynamic de-skew feature which will continuously de-skew the HS data received on the DA[3:0]P/N interface and provide a retimed version on the DB[3:0]P/N interface. The retimed version is centered within the DBCP/N clock.

    2. The DPHY440 does not compensate for impedance mismatch

    3. The DPHY440 does not support MIPI C-PHY.

    Thanks

    David