DS90UH940-Q1: DS90UH949-Q1 + DS90UH940-Q1 latency ?

Hi PY,

In order to determine the total latency from UH949 to UH940, you need to add the two parameters together from the serializer and deserializer. They are specs separately. For UH949, it should be tSD (Serializer Delay). For UH940, it is slightly complex to determine the latency. Since the maximum of the CSI-2 buffer size is 512x32 bit words where each 32 bit word corresponds to one pixel. If you know the PCLK, you can back calculate the pixel time (1/PCLK). For example, assuming the PCLK is 148.5 MHz, the pixel time is about 6.7ns; therefore, you can use 6.7ns to find the deserializer latency 512x6.7ns = 3.4µs.

So, the latency from FPD-Link input to CSI-2 output should be ~3.4us max.

Hope this helps. Let me know if you have any questions.

Aaron