TLK2711-SP: Data acquisition time parameter

Jonathan Navor

Part Number: TLK2711-SP

Hi Guys,

We need your help us to clarify the parameter in recommended operating conditions for our customer. Data acquisition time is said to be 1024 bits. Could you please clarify to which part of device is that referring to?

We could infer it is related to PLL lock, in this case the concerned bit time is the one of the incoming data on WzL link at 2.5Gbps (400ps * 1024bit = 409.6 ns to get the PPL locked ) or another bit time is referred to?

Thank you in advance for the support.

Best regards,

Jonathan

over 4 years ago

0 Rodrigo Natal over 4 years ago

TI__Mastermind 19235 points

Request noted. Will reply soon.

Thanks,

Rodrigo Natal

HSSC Applications Engineer

0 Rodrigo Natal over 4 years ago

TI__Mastermind 19235 points

Data acquisition time is the typical number of bits that are required for the recovered reference clock to lock to the PLL when it is receiving data for the first time. Prior to the PLL locking to the received reference, the data edge may be sampled incorrectly. This will vary somewhat based on how good of frequency matching between the RX and TX clocks. So, your inference is correct.

Thanks,

Rodrigo Natal HSSC Applications

0 Gianni Tornaghi over 4 years ago in reply to Rodrigo Natal

Prodigy 20 points

Thanks a lot for the prompt clarification and confirmation. Very appreciated.

Best regards

Interface

Interface forum

TLK2711-SP: Data acquisition time parameter