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TUSB1310A: Effect when power turned off while supplying external power

Part Number: TUSB1310A

Hello team,

I have received a question from a customer about possibility of power off effect of TUSB1301A.

When using the TUSB1310A, could any problem likely to occur if the device is turned off (power to the TUSB1310A is turned off) while still supplying external power to the VBUS pins?

They are concerned about effects caused inside the IC or affecting other pins.

The circuit itself is designed according to TI reference as Figure 6-2. Analog Pin Connections in datasheet page 33.

If there are additional customer system information needed for the answer, please contact us.

Best Regards,

Ryotaro Fukui

  • Ryotaro:

          1.1v should be start early than 3.3v when power up and power off late than 3.3v

    Regards,

    brian

  • Hello Zhou,

    Thank you for the comment. I received an question from the customer about your feedback.

    I understand that this is not specific to their situation, but is a sequence to follow regardless of the status of the VBUS pin, is it correct?

    Also, is there a document describing the above off sequence? The on sequence was verified in the datasheet, but they couldn't find the off sequence.

    Regards,

    Ryotaro Fukui

  • Ryotaro:

               Power sequence to follow regardless of the status of the VBUS pin.

              There is no document for power off  sequence.. it's not that important as power on sequence.

    Regards,

    brian

  • Hello Zhou,

    Based on the answers, they understood that there is no problem with the power off/on operation while the VBUS is on, as long as the power sequence is followed to prevent it from affecting other voltages. (Especially the on sequence is important)

    I would like to declare this case closed. Thank you for your support.

    Regards,

    Ryotaro Fukui

  • Hello Zhou,

    As for the previous question, I have heard from the customer that they would like a clear confirmation from the BU.

    "Is it OK to understand that there is no problem of sneak currents or latch ups with the power off/on operation while the VBUS is on, as long as the power sequence is followed?"

    We would appreciate if we could get a simple response like yes or no.

    By the way, the current flow to the VBUS is approximately 0.049 mA.

    Regards,

    Ryotaro Fukui

  • Ryotaro:

          Does customer using VBus as 1.1v and 3.3v supply?

    Regards,

    Brian

  • Hello Brian,

    According to the design provided from them, we heard that the VBUS is connected only to the USB connector and does not supply power to any other devices. The circuit is designed according to Datasheet Figure 6-2. Analog Pin Connections (p.33).

    If there were any other device that supplies it, would a sneak current occur, regardless if the sequence is followed? I would also like to know that case too.

    Regards,

    Ryotaro Fukui

  • Ryotaro:

           First, there are should be  resistor divider on VBus pin, so the voltage on the pin is pretty low and current is limited.

    When in device mode, if device is plugged into a host and power supply of device is off. There is  a low leakage from Vbus pin to device.

    Regards,

    Brian

  • Hello Brian,

    Sorry for the misunderstanding. I have completely mistaken customer's inquiry point. I would like to reexplain the organized content below.

    The VBUS line is used to power other ICs. The TUSB1310A monitors the VBUS line voltage at the VBUS pin. TUSB1310A is powered from the VDD pins, but they are concerned that when VDD is turned off while function, an internal leakage path from the VBUS pin to VDD pins will occur.

    Would this like to happen? Or is there some kind of internal protection?

    Regards,

    Ryotaro Fukui

  • Ryotaro:

            Vbus pin could back drive. But voltage on this pin will be low (<0.5v)

    Regards,

    Brian