Hi
Cloud you help to check SN65DP159 schematic as below and any need to adjust
Thanks you
a. HDMI_SEL# High: Will I be unable to use I2C over AUX?
b. HDMI_SEL# Low: Does the DP-HDMI Adaptor ID have any effect? (DVI CONN at the end)
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Hi
Cloud you help to check SN65DP159 schematic as below and any need to adjust
Thanks you
a. HDMI_SEL# High: Will I be unable to use I2C over AUX?
b. HDMI_SEL# Low: Does the DP-HDMI Adaptor ID have any effect? (DVI CONN at the end)
Hi,
1. Please have SCL_SRC and SDA_SRC pulled to ground
2. Recommend having I2C access to the DP159 for debugging purpose
3. Change 0.1uF on the OE pin to 0.22uF
4. Do you need ESD protection on the DVI output?
5. Please double check the input and output lane order and make sure it is correct?
Thanks
David
Hi David
Thanks for you reply
How about HDMI_SEL# usage is ?
Here SPEC has suggestion by using 0.1uf.
Is there any timing issue with 0.1uF ?
Hi,
You can use 0.1uF cap on the OE pin as long as you can meet the TD2 power up timing requirement listed in the DP159 datasheet.
In the schematic, the DP159 output is MUXed to a HDMI_DOCK and a DVI connector.
DVI vs HDMI is just the adapter ID. I see no risk sending HDMI when HDMI_SEL is low.
But when HDMI_SEL is set to DVI, the source will likely not enable audio and the source may also limit the datarate to 1080p. Will this be an issue for the HDMI_DOCK connection?
Thanks
David
Hi David
In the schematic, the DP159 output is MUXed to a HDMI_DOCK and a DVI connector.
We’ll set HDMI_SEL# low as default.