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SN65DP159: schematic check

GARETH OU
Guru 12075 points

Part Number: SN65DP159

Hi

Cloud you help to check SN65DP159  schematic  as below and any need to adjust

Thanks you

Crete_TGLH_2DVI (002).pdf

a. HDMI_SEL# High: Will I be unable to use I2C over AUX?

b. HDMI_SEL# Low: Does the DP-HDMI Adaptor ID have any effect? (DVI CONN at the end)

  • 0
    TI__Guru**** 185461 points

    Hi,

    1. Please have SCL_SRC and  SDA_SRC pulled to ground

    2. Recommend having I2C access to the DP159 for debugging purpose

    3. Change 0.1uF on the OE pin to 0.22uF

    4. Do you need ESD protection on the DVI output?

    5. Please double check the input and output lane order and make sure it is correct?

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Guru 12075 points

    Hi David

    Thanks for you reply 

    How about HDMI_SEL# usage is ?

    1. Change 0.1uF on the OE pin to 0.22uF

    Here SPEC has suggestion by using 0.1uf.

    Is there any timing issue with 0.1uF ?

  • 0 in reply to GARETH OU
    TI__Guru**** 185461 points

    Hi,

    You can use 0.1uF cap on the OE pin as long as you can meet the TD2 power up timing requirement listed in the DP159 datasheet.

    In the schematic, the DP159 output is MUXed to a HDMI_DOCK and a DVI connector. 

    DVI vs HDMI is just the adapter ID. I see no risk sending HDMI when HDMI_SEL is low.

    But when HDMI_SEL is set to DVI, the source will likely not enable audio and the source may also limit the datarate to 1080p. Will this be an issue for the HDMI_DOCK connection?

    Thanks
    David

  • 0 in reply to David (ASIC) Liu
    Guru 12075 points

    Hi David

    In the schematic, the DP159 output is MUXed to a HDMI_DOCK and a DVI connector.

    • The connecter of dock is also DVI type.
    • There are two DVI connecters in our system.

     

    We’ll set HDMI_SEL# low as default.