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TPS25750: How to config. ADCIN1 and ADCIN2?

Paul Yeh
Genius 16475 points
Part Number: TPS25750


Hi team,

My customer is asking how to config. ADCIN1/ADCIN2 pin by external resistor.

We can see table 9-5 in datasheet but we can't find how to config hareward pin to map below table?

And what's meaning of number 0,1,2,3,54,5,6,7 for ADCIN1 and ADCIN2? How they map to hardware pin setting?

Thanks

  • 0
    TI__Mastermind 33201 points

    Here is a JPEG that explains the number coding.  It is a voltage divider related to the LDO_3V3 supply.

  • 0 in reply to Chuck Branch
    TI__Genius 16475 points

    Chuck,

    Thanks for information but due to picture is too small so the resolution is too bad to see right data.

    Could you zoom in the data as well?

    Thanks

  • 0 in reply to Paul Yeh
    TI__Mastermind 33201 points

    Paul,

    Here is the table copied in a format that you can copy into word or any other format

    Table 8-2. Decoding of ADCIN1 and ADCIN2 Pins

     

    DIV = RDOWN / (RUP + RDOWN)(1)

     

    Without using RUP or RDOWN

    ADCINx decoded value

    MIN

    Target

    MAX

    0

    0.0114

    0.0228

    tie to GND

    0

    0.0229

    0.0475

    0.0722

    N/A

    1

    0.0723

    0.1074

    0.1425

    N/A

    2

    0.1425

    0.1899

    0.2372

    N/A

    3

    0.2373

    0.3022

    0.3671

    N/A

    4

    0.3672

    0.5368

    0.7064

    tie to LDO_1V5

    5

    0.7065

    0.8062

    0.9060

    N/A

    6

    0.9061

    0.9530

    1.0

    tie to LDO_3V3

    7

    (1)     External resistor tolerance of 1% is recommended. Resistor values must be chosen to yield a DIV value centered nominally between listed MIN and MAX values. For convenience, the Target column shows this value.

  • 0 in reply to Chuck Branch
    TI__Genius 16475 points

    Chuck,

    One more question about TPS25750 VM board. in our EVM board setting, we only program ADCIN1 or ADCIN2 voltage to 3.3V or 1.5V.

    This two voltage is not met your table, so could you advise?

    Thanks

  • 0 in reply to Paul Yeh
    TI__Mastermind 33201 points

    Paul,

    This is a gap in the capability of the EVM.

    If you are able, you can remove put an appropriate resistor across SW1A to control ADCIN1 as a resistive divider.  It will be much more difficult to adjust ADCIN2 to any value above VIN_1V5.

    Regards,

    Chuck