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HD3SS3220: SSTX/SSRX are swapped in UFP Board

Part Number: HD3SS3220

Hi, Team

In the document, page 7, J1 connector, PIN 5/6, PIN 8/9, the SSTX, SSRX are swapped.

https://www.ti.com/lit/ug/sllu241a/sllu241a.pdf

But in HD3SS3220 datasheet, there is a figure 8-3, which is a UFP  application, the SSTX, SSRX is directly connected but not swapped.

Customer wants to use HD3SS3220 in a UFP application, in a FPGA board, but the FPGA is in Device Mode.

What is the correct way?