TCA9800: Clock Stretching Off Consult

The I²C protocol is bidirectional, and the TCA980x does not know on which side the master is. For the TCA980x, clock stretching looks exactly the same as a normal clock signal, and is buffered in the same way.

The datasheet says that the TCA980x supports clock streching, but this is not a separate function, it is simply an effect of the bidirectional buffering.

Can you show an oscilloscope trace of the problem?

Hi Ladisch,

Thanks for reply. So TCA9800 doesn't have internal clock stretching functions inside. Because I2C is bidirectional, TCA9800 will only response other's device clock stretching phenomenon, like UCD9090A in above system. So there is no saying to turn off clock stretching function of TCA9800 here, right?

Best,

Stanley

Yes, the TCA980x never does clock stretching by itself.

Hi Ladisch,

But customer feedbacks the clock stretching is disappeared after adding pull-up resistor(4.7kohm) in SCLB with VCCB. So they suspect this clock stretching is related with our TCA9800. 

Another thing is our D/S doesn't recommend to add pull-up resistor in B side. Is there any risk to do that?

Update customer schematic here:

Update two frequency waveform here:

--- 62.5khz, normal one

 --- 41.67kHz, frequency pulled down one.

Best,

Stanley

Stanley,

TCA980x does not have any kind of state machine that would cause it to initiate clock stretching by itself. It only repeats what it sees on its input. The VoL looks the same on the SCL which means which ever device is driving the SCL line is the one causing the clock stretching. The second image you posted looks like it may be a corrupted signal since the data packet is 28 clock pulses and an ACK that happens on the last one signaling that something desync'd.

Which side is B side of TCA980x facing? Is A side facing the PI3125 device?

-Bobby

Hi Bobby,

Yes, the A side is PI3125. B side is CPLD. Add one more question, which side(A/B) will determine final SCL frequency? 

And I notice B side is integrated with current source. If customer add pull-up resistor here, what the risk our device will face?

Best,

Stanley.

Hi Stanley,

Add one more question, which side(A/B) will determine final SCL frequency? 

The controller/host determines the frequency of the clock signal. I'm guessing you're asking what's the limiting factor for frequency on the TCA980x.

B side of TCA980x determines the rise time. TCA9800 has the weakest drive strength while TCA9803 has the strongest drive strength.

You can see in table 27 that if B side is loaded above ~90pF, the TCA9800 will not meet the 300ns rise time requirement for 400kHz. 

Adding a pull up resistor can cause the I2C buffer to oscillate. 

-Bobby

Hi Bobby,

Understood~

Another abnormal phenomenon is the small voltage step after 8us SCL command. Pls see below waveform. Do you happen to know what cause this phenomenon here? Thanks.

Best,

Stanley

By the way, I checked your scopeshot again, I originally said I thought there may be a corrupted signal but I believe what the scopeshot is showing is 2 I2C transactions then a stop start condition into a new transaction then the mcu/controller clock stretches. I think this is related to the controller's I2C library or hardware module.