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Original question:

DS90UB960-Q1: DS90UB960 Lock time

DS90UB960-Q1: No lock acquired, what can be causing it?

Roberto Gutierrez
Prodigy 21 points
Part Number: DS90UB960-Q1

Hello, client is working with ub960 deserializer connected to ub953 serializers, I'm trying to get the first basic setup to link them, but there is no lock on the ub960 register.

I'm using a polling mechanism of about 2ms to check for the RX_PORT_STS1 register, and almost(if not all reads) have the LOCK_STS_CHG flag on 1, meaning the lock changed, but when I read the LOCK_STS bit, it remains at 0, meaning there is no lock, only sometimes I read it and is 1, but then the polling again says the LOCK_STS is 0 again after the 2ms, meaning no stable lock is achieved either. 

An example read of this register for port 2 yields: RX_PORT_STS1 = b0

What could be the causes of this? We are using 4 ports, and the same behavior happens to all of them. And I can confirm the serializer's PDB are on, using PoC circuit. 

I also took a look at the REFCLK registers in the ub960, and returning REFCLK_FREQ = 1c, which says REFCLK is around 28MHz, could this be a potential issue?

- Deserializer mode is set to CSI Mode

- Serializer CLK is derived from the deserializer

Best Regards,

Roberto Gutierrez,

Embedded Software Engineer

  • 0
    TI__Guru 66820 points

    Hi Roberto, 

    Thanks for your question. 

    Are you able to provide a register dump of the 960 for us to investigate further? 

    Regards,

    Logan

  • 0 in reply to Logan Cummins
    Prodigy 21 points

    Hi Logan, I'm working on getting the i2cdump for the registers, in the meantime, here are some register logs I've got from the driver:

    [2] BCC_ERR_CTL: 20
    [2] BCC_STATUS: 00
    [2] DEVICE_STS: d0
    [2] REFCLK_FREQ: 1c
    [2] RX_PORT_STS1: b0
    [2] RX_PORT_STS2: f9
    [2] CSI_RX_STS: 0f

  • 0 in reply to Logan Cummins
    Prodigy 21 points

    Hi Logan,

    Find here the output of i2cdump: 

    i2cdump -f -y 10 0x3d
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 7a 00 1e 40 d0 01 00 fe 1c 10 7a 7a 0f b0 00 ff    z.?@??.???zz??..
10: 00 00 00 00 00 00 00 00 80 61 a8 e3 dd 00 04 04    ........?a???.??
20: 00 03 00 0f 86 00 00 00 00 00 00 00 00 00 00 00    .?.??...........
30: 00 00 01 43 00 00 00 10 00 00 00 00 00 00 00 00    ..?C...?........
40: 00 a9 00 ff 00 00 20 00 00 00 00 12 01 00 02 00    .?.... ....??.?.
50: 00 00 00 00 00 00 00 00 5e 00 00 00 00 30 64 00    ........^....0d.
60: 00 00 00 00 00 80 c0 00 00 00 00 00 00 7c 88 88    .....??......|??
70: 2b 2c 00 00 00 00 00 c5 00 01 00 00 00 00 00 00    +,.....?.?......
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 0a ca 0a cb ff ff ff ff 00 00 00 00 00 00 00 00    ????............
a0: 00 00 00 00 00 1c 00 00 00 00 00 00 00 00 00 00    .....?..........
b0: 1c 13 1f 08 25 00 18 00 fc 3f 83 74 80 00 00 00    ????%.?.???t?...
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 43 e0 03 60 f0 00 00 00 01 00 00 00 00 00 00    .C??`?...?......
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 5f 55 42 39 36 30 00 00 00 00 00 00 00 00 00 00    _UB960..........

    Thanks,

    Roberto Gutierrez

  • 0 in reply to Roberto Gutierrez
    Prodigy 21 points

    Hi Logan, sorry that i2cdump doesn't select the RX Port that we are testing now correctly, which is port 2, this one does it:

    i2cdump -f -y 10 0x3d
No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 7a 00 1e 40 d0 01 00 fe 1c 10 7a 7a 0f b0 00 ff    z.?@??.???zz??..
10: 00 00 00 00 00 00 00 00 80 61 a8 e3 dd 00 04 04    ........?a???.??
20: 00 03 00 0f 86 00 00 00 00 00 00 00 00 00 00 00    .?.??...........
30: 00 00 01 43 00 00 00 13 00 00 00 00 00 00 00 00    ..?C...?........
40: 00 a9 00 ff 00 00 20 21 00 00 00 12 24 b0 f9 1d    .?.... !...?$???
50: eb 00 00 03 00 00 00 00 5e 00 00 32 00 30 64 00    ?..?....^..2.0d.
60: 00 00 00 00 00 84 c4 00 00 00 00 00 00 7c 88 88    .....??......|??
70: ab ac aa 00 02 00 00 c5 00 01 0f ff 00 00 00 00    ???.?..?.??.....
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 15 87 15 89 ff ff ff ff 00 00 00 00 00 00 00 00    ????............
a0: 00 00 00 00 00 1c 00 00 00 00 00 00 00 00 00 00    .....?..........
b0: 1c 13 1f 08 25 00 18 00 fc 3f 83 74 80 00 00 00    ????%.?.???t?...
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 43 e0 17 60 f0 00 00 00 01 05 7b 00 00 00 00    .C??`?...??{....
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 5f 55 42 39 36 30 00 00 00 00 00 00 00 00 00 00    _UB960..........

    Best regards,

    Roberto Gutierrez

  • 0 in reply to Roberto Gutierrez
    TI__Guru 66820 points

    Hi Roberto, 

    Thanks for the information.

    Roberto Gutierrez said:
    I also took a look at the REFCLK registers in the ub960, and returning REFCLK_FREQ = 1c, which says REFCLK is around 28MHz, could this be a potential issue?

    For 953-960 CSI-2 operation, a 25MHz REFCLK is need, if a 28MHz one is being used can you swap it out for a 25MHz to see if it fixes your issues? 

    Regards, 

    Logan

  • 0 in reply to Logan Cummins
    Prodigy 21 points

    Hi Logan,

    Let me try and see if I can use a 25MHz one, I'll let you know

    Thanks

  • 0 in reply to Logan Cummins
    Prodigy 21 points

    Hi Logan,

    I can confirm that the REFCLK is 25MHz, is there anything else that could be causing this lock problem? 

    Thanks

  • 0 in reply to Roberto Gutierrez
    TI__Guru 66820 points

    Hi Roberto, 

    Are you saying that the Osc was already 25MHz, or that you changed to 25MHz but still experiencing the same lock issues? 

    Other areas to verify/look into would be:

    • Can you provide an i2cdump of the SER?
    • On both SER and DES sides, verify POC and system power rails are stable and as expected
      • If POC power is suspect, you can try isolating SER power by powering from bench supply.
    • Verify the power up sequence follows datasheet recommendations and PBD comes up after rails are stable
    • What is your cable type/length?
    • IO supply mode is set to 3.3V via IO_CTRL register; can you verify this is the case in HW?

    Regards, 

    Logan

  • 0 in reply to Logan Cummins
    Prodigy 21 points

    Thanks Logan, I will try your suggestions and tell you how it goes. The osc was already at 25MHz confirmed

    Regarding the i2cdump of the serializer, I can't provide it because it is not detected, because there is no link, is this normal to happen if there is no link? Should I see it anyway?

    Cable is FAKRA 12ft/3.65m

    Best regards,

    Roberto

  • 0 in reply to Roberto Gutierrez
    TI__Guru 66820 points

    Roberto, 

    The I2C dump would need to be performed on the local I2C bus on SER board. You are correct that when there is a loss of link, the forward channel I2C can't be performed. 

    Logan

  • 0 in reply to Logan Cummins
    Prodigy 21 points

    Thanks Logan, 

    Verified the IO_CTL is properly configured. HW tests later.

    Another question, will the lock be lost on encode errors? 

    Roberto

  • 0 in reply to Roberto Gutierrez
    TI__Guru 66820 points

    Hi Roberto, 

    There are a number of errors according to your register dump that you provided (as shown below). Most of which might be the effect of link instability rather than the cause. 

    Can you also share the schematic for both designs, as well? I'd like to take a pass and see if everything looks okay on strap pins, PoC network, etc. 

    Logan