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TPS65988DJ: Connection issue on port 1

Part Number: TPS65988DJ

Hi Sir,

 My customer use TPS65988DJ on AMD platform design. There's a strange condition: When connecting port 2, port 1 will not build up correct CC communication (only build up Rp connect but no other information seen on debug register: no plug, no cc orientation, no port role...) (easy to repeat it with device with higher load on port 2). But when we remove port 1, port 2 will build up connection automatically. Would you please help to suggest where we can debug our setting. Thanks. (If we plug port 1 first, everything is fine).

 In this condition, input power for PPHV1/2 (same 5V source) is ok. No voltage drop condition found from cable plug/remove.

Best regards,

Gary Teng

TPS65988DJ_0p8_Renior_Celadon_1120_CEL04_m_octest.pjt

sapphire.zip

  • Hi Gary,

    Can you us this default AMD pjt and try? Something is not right with the customer's project file as I can't get port B working for 5V contract.

    I don't see anything peculiar on port B though, I don't modify the GPIO as it will be different in customer use case anyway.

    Can you check with the 988DJ EVM and see what causes port B to not working with their pjt file using this default pjt file to compare?

    Default AMD 6.2.11.pjt

    Regards,

    Peter