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TPD4E001: USB ESD Protection During Plug-in

Colton Acosta
Prodigy 10 points
Part Number: TPD4E001

Hi, 

I am using the TPD4E001RDBVR for ESD protection of a USB signal. The board contains inrush limiting circuitry that sits between the 5V line of the USB bus and the 5V line powering the other board components, which functions to slow down the 5V rail during a plug-in event. I was wondering if there is any disadvantage to using this slower 5V rail for the ESD protection chip power? Or should I directly route the USB 5V connector pin to the power-supply input of the chip? In both cases a 0.1uF decoupling capacitor would be used to bypass the power-supply input to ground. I’ve included screenshots of the two schematic configurations below. U6 is the ESD chip. 

Inrush limited supply:



Direct supply: 



Thanks, 

Colton Acosta

  • 0
    TI__Expert 8486 points

    Hi Colton,

    It depends on the amount of inrush current you are expecting and how long the surge will last. This device has a 5.5 A IEC 61000-4-5 surge rating which means it can survive a 8/20 us pulse where the peak pulse current is 5.5 A. If the inrush falls within those specs, this device can be used like the 2nd picture to protect that power line even more. However, if the inrush goes past those specs, then the Vcc  pin should be connected like the 1st picture to the limited supply to prevent the inrush current from exceeding the diode's limits. 

    The main drawback I can see using 1st picture is that if an ESD event happens while plugging in a USB cable, the Vcc pin might not be biased in time due to the current limiting circuitry on the power line. This would cause your clamping voltage to be higher. I'm saying all this with the assumption that Vbus is the source of power for that 5 V line. 

    Please let me know if this answers your question or if I was wrong in any of my assumptions.

    Regrads,

    Matt Smith