DS90UB954-Q1: LOCK pin output with or without PCLK signal to serializer

Taichi Tanaka

Part Number: DS90UB954-Q1

Used in combination with the DS90UB913 and the DS90UB954–Q1.
When using the DS90UB954 Q1 in the RAW12 HF mode, it was noted on the data sheet that the LOCK pin is high only when a active PCLK signal is input to the DS90UB913.
However, after the PCLK is stopped, the LOCK becomes low once and then returns to high.
What are the possible causes of this behavior?

over 4 years ago

0 Logan Cummins over 4 years ago

TI__Guru 66810 points

Hi Taichi,

Thank you for your question. Let me look into this for you and I will get back to you in the next 1-2 days.

Regards,

Logan

+1 Logan Cummins over 4 years ago in reply to Logan Cummins

TI__Guru 66810 points

Hi Taichi,

In RAW12 HF, this behavior matches what is expected from LOCK_STS register. As the PCLK is stopped, operation will switch to internal CLK for reconnection to 954, then remain high.

Can you confirm you are observing the LOCK or the LOCK_STS output?

Regards

Logan

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DS90UB954-Q1: LOCK pin output with or without PCLK signal to serializer