DS90UB947-Q1: MAPSEL information update in datasheet

Johnny Guo

Part Number: DS90UB947-Q1

Hi team,

Since for 947, MAPSEL=1 is OpenLDI bit mapping, can you check if we will correct the error in datasheet shown below? If yes, do you have timeline for the plan?

Thanks.

Johnny

over 4 years ago

0 Hamzeh Jaradat over 4 years ago

TI__Guru** 108320 points

Hello Johnny,

why do you believe this is wrong and should be corrected?

Having 1 or 0 in the register does not mean you should have the same value in the MODE_SEL table!!

0 Johnny Guo over 4 years ago in reply to Hamzeh Jaradat

TI__Expert 4910 points

Hi Jaradat,

Please correct me if I am wrong. In below FAQ, and in datasheet BRIDGE_CTL register, "1" means OpenLDI mapping.

https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1002115/faq-ds90ub947-q1-mapsel-setting-for-ub947

0 Hamzeh Jaradat over 4 years ago in reply to Johnny Guo

TI__Guru** 108320 points

Hello Johnny,

The register values are correct. 0: SPWG and 1: oLDI. Similarly 0: Dual-pixel and 1: single pixel.

I know this is a bit confusing, but this does not need to match with the MODE_SEL table. The table values are configured via resistors. But once you chose the correct configuration using resistors, this will be reflected with the correct value in register 0x4F.

0 Johnny Guo over 4 years ago in reply to Hamzeh Jaradat

TI__Expert 4910 points

Hi Hamzeh,

Thanks for reply, but how to understand the setting "0" and "1" in MODE_SEL settings table? Just need to align "0" and "1" in following Configuration Select table? Not the direct mapping to register bit "0" and "1"?