TPD3S714-Q1: Connection between TPD3S714 and TUSB4041

Amelie Zheng

Part Number: TPD3S714-Q1

Hi Team,

The USB protection chip TPD3S714-Q1 in Figure 1 is used in conjunction with TUSB4041, where /FLT is connected to the OVERCUR4Z pin of TUSB4041, and the EN pin is connected to BATEN4, as shown in Figure 2.

The current problem is that before the TPD3S714-Q1 is enabled, the oscilloscope is used to measure the /FLT pin and the display is 0V. After the TUSB4041 collects the state of this pin, it is considered to be faulty.
We suspect that the 4041 is detected as a fault state, and the TPD3S714-Q1 is not enabled to control the output, so the U disk cannot be accessed.
We tried to disconnect the 10-pin FLT of TPD3S714 from 4041 and found that the U disk can be used normally.
Is the chip application correct? How to solve this problem?

over 4 years ago

0 Ansel Song over 4 years ago

TI__Expert 3890 points

Hi Amelie,

Yes, I think you are right. When \EN is high, the switch is off and /FLT is low. I think /EN pin should be enabled first, and then /FLT status should be read by processor.

Regards,

Ansel

0 yang yang over 4 years ago in reply to Ansel Song

Prodigy 30 points

Hi Ansel,

On the above question of Amelie.How does tusb4041 set the EN pin first and then read the status of FLT pin?

0 Ansel Song over 4 years ago in reply to yang yang

TI__Expert 3890 points

Hi Yang,

Sorry, I am only responsible for TPD3S714 family devices, please submit another ticket for tusb4041.

Regards,

Ansel

0 yang yang over 4 years ago in reply to Ansel Song

Prodigy 30 points

Hi Ansel,

If the VIN pin（9 pin） of TPD3S714 is not connected to the power supply, what is the status of FLT pin?

0 Ansel Song over 4 years ago in reply to yang yang

TI__Expert 3890 points

Hi Yang,

FLT is open-drain structure, it is high impedance status. If there is no VIN, it should be low.

Regards,

Ansel

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TPD3S714-Q1: Connection between TPD3S714 and TUSB4041