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DS90UB941AS-Q1: How to compute the PCLK under splitter mode?

Sherry Liang
Genius 10255 points
Part Number: DS90UB941AS-Q1

Dear team,

The customer plans to use 941's splitter mode to drive two 1920*720@60fps display. The horizontal blanking is 160, and the vertical blanking is 40, so the display PCLK=(1920+160)*(720+40)*60=94.848MHz. For our 941, we use splitter mode, so we only use one DSI port. Our one port can support 105MHz, but the two display's PCLK is 94.848*2=189.696MHz. One port of 941 can't support so large PCLK, so we can't support two 1920*720@60fps display with splitter mode, right?

Thanks & Best Regards,

Sherry

  • 0
    TI__Guru** 103215 points

    Hello Sherry,

    In splitter mode you would be driving 1 display per FPD-Link right? So each link would be 94.848MHz which is within the 941AS single link capability. On the DSI side, 941AS can support up to 1.5Gbps/lane over 4 lanes so there is plenty of BW to receive the dual image and in fact, this is a common use case for 941AS. 

    On the DSI side, the 941AS should receive a superframe image in L/R 3D format with the two 1920x720 images forming a 3840x720 image. Each horizontal component of the blanking intervals for the 1920x720 image should be doubled for the 3840x720 image, so for example if the horizontal sync width for the 1920x720 image is 40 pixels, then the superframe should have 80 pixels for the HSW. The PCLK for the superframe will also be double the PCLK of each video, so the superframe would be 3840x720 with PCLK = 189.696MHz and then when you operate 941AS in symmetric splitter mode, then each port will get 0.5*189.696MHz PCLK. 

    Best Regards,

    Casey