TPS25750EVM: Reserved resister and hardware reset

Michiaki Tanii

Expert 4610 points

Part Number: TPS25750EVM
Other Parts Discussed in Thread: TPS25750

Hi team,

Customer want to know how to do hardware reset TPS25750 from host.
They evaluated the below conditions

Configure MRESET of GPIO at GPIO0 pin with TPS25750 Application Customization Tool.
Confirm if RESET is triggered with GPIO0 getting low after shutdown and boot up but RESET isn’t triggered.
Remain 0 at bit 1 of INT_EVENT1 resister

About bit0 of INT_EVENT1
Bit0 of INT_EVENT1 is getting 1 if INT_EVET1 is read when interrupt is happened .
In the reference manual, the bit is reserved. Customer can ignore the bit ? and Can they clear every reserved bit ?

Thank you and best regards,

Michiaki

over 4 years ago

0 Chuck Branch over 4 years ago

TI__Mastermind 32791 points

MIchiaki,

The MRESET command generates a GPIO event that executes a "PCB" level reset, but does not reset the TPS25750.

There is no reset pin, but it is possible to reset the TPS25750 using the I2C interface.

The host interface manual (TRM) TPS25750 Host Interface Technical Reference Manual describes a series of interface commands. One of the commands is called GAID. This command will perform a hard reset of the TPS25750. Another command is called gaid. This will perform a soft reset which does not reset all of the hardware registers.

Regards,

Chuck

0 Michiaki Tanii over 4 years ago in reply to Chuck Branch

TI__Expert 4610 points

Hi Chuck,

Could you expand what “PCB” level reset is and when MRESET is used ?

I couldn’t understand the use case for MRESET.

Thank you and best regards,

Michiaki

0 Chuck Branch over 4 years ago in reply to Michiaki Tanii

TI__Mastermind 32791 points

Michiaki,

Mreset is used in the case where you where it is desirable to reset everything in the system except for the PD controller that is providing power.

Regards,

Chuck

0 Michiaki Tanii over 4 years ago in reply to Chuck Branch

TI__Expert 4610 points

Hi Chuck,

Please let me clarify what “PCB” level reset is.

And looking into TPS25750 Host Interface Technical Reference Manual but we couldn’t find the command of “GAID” and “gaid”

Could you kindly advice where those are described ?

Thank you and best regards,

Michiaki

0 Chuck Branch over 4 years ago in reply to Michiaki Tanii

TI__Mastermind 32791 points

MIchiaki,

Here is a link to the TRM: TPS25750 Host Interface Technical Reference Manual.

I also checked the TRM for the TPS25750 and I must apologize that the reset commands that I mentioned are not supported.

I need to take some time to review exactly how to execute a software reset of the TPS25750.

Regards,

Chuck

0 Michiaki Tanii over 4 years ago in reply to Chuck Branch

TI__Expert 4610 points

Hi Chuck,

I understand you need to take some time how to excecure hardware reset of TPS25750 but how about the below inquiry ?

About bit0 of INT_EVENT1
Bit0 of INT_EVENT1 is getting 1 if INT_EVET1 is read when interrupt is happened .
In the reference manual, the bit is reserved. Customer can ignore the bit ? and Can they clear every reserved bit ?

Thank you and best regards,

Michiaki

0 Chuck Branch over 4 years ago in reply to Michiaki Tanii

TI__Mastermind 32791 points

Michiaki,

The Interrupt registers are defined on page 15 of the TRM.

The INT_EVENT register shows the actual events. They will toggle high when they are triggered.

The INT_MASK register allows you to enable/disable the events. Any event with a bit set to 1 is enabled

The INT_CLEAR register is used to clear individual events. If you wish to clear all events which is a common decision, then simply write 11 bytes of 0XFF to the INT_CLEAR register.

I am still looking into if a method to issue a software reset has been implemented in this part.

Regards,

Chuck

0 Michiaki Tanii over 4 years ago in reply to Chuck Branch

TI__Expert 4610 points

Hi Chuck,

Customer question is that they would like to make sure whether they need to take care reserved bit or not.

As you know, bit0 of INT_EVENT1 is reserved bit but customer confirmed the bit is asserted to 1 when interrupt is happened.

And want to make sure if they can ignore the reserved bit or need to clear every reserved bit.

Regarding the other inquires, could you advise how to RESET via I2C ?

Thank you and best regards,

Michiaki

0 Chuck Branch over 4 years ago in reply to Michiaki Tanii

TI__Mastermind 32791 points

Michiaki,

The customer does not need to clear reserve bits in the ISR. They will not impact the firmware performance.

I have not found a supported method to reset the TPS25750D over I2C. I am still waiting to hear back from one more engineer.

Regards,

Chuck

0 Michiaki Tanii over 4 years ago in reply to Chuck Branch

TI__Expert 4610 points

Hi Chuck,

Could you kindly advise when you can update how to reset ?

Thank you and best regards,

Michiaki

0 Ghouse Mohiuddin23 over 4 years ago in reply to Michiaki Tanii

TI__Expert 8130 points

Chuck is out office, please expect some delays on this.

0 Michiaki Tanii over 4 years ago in reply to Ghouse Mohiuddin23

TI__Expert 4610 points

Hi team,

When will we get your response ?

Thank you and best regards,

Michiaki

0 Chuck Branch over 4 years ago in reply to Michiaki Tanii

TI__Mastermind 32791 points

I have returned from my vacation.

I have reviewed with our firmware team and the TPS25750 does not offer a method to issue a software reset.

Regrads,

Chuck

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TPS25750EVM: Reserved resister and hardware reset