SN65DSI84: SN65DSI84ZXHR oscillator selection for my display

Hi,

Any reason why you want to use an external oscillator instead the DSI clock?

You can use REFCLK_MULTIPLIER to define your oscillator clock frequency based on the LVDS output clock

REFCLK_MULTIPLIER When CSR 0x0A.0 = ‘0’, this field controls the multiplier used to generate the LVDS output clock from the input REFCLK. When CSR 0x0A.0 = ‘1’, this field must be programmed to 00.

00 – LVDS clock = source clock (default)

01 – Multiply by 2

10 – Multiply by 3

11 – Multiply by 4

LVDS Clock = Pixel Clock * (1+%Blanking) = 144 * (1+0.2) = 172.8MHz. For multiply by 3, the oscillator frequency is 57.6MHz.

Thanks

David 

Hi,

Thanks for your feedback. I am using 65Mhz on REFCLK port of SN65DSI84ZXHR. I need to ask the Refclk oscillator should be according to DCLK frequency of display panel specs or it is just required for chip for DSI to MIPI conversion?

Hi,

The oscillator frequency is multiplied by the factor in REFCLK_MULTIPLIER (CSR 0x0B.1:0) to generate the LVDS output clock (DCLK).

Thanks

David

LVDS Clock = Pixel Clock * (1+%Blanking) = 144 * (1+0.2) = 172.8MHz. For multiply by 3, the oscillator frequency is 57.6MHz.

That's calculated value. can I use external oscillator of 65MHz on REFCLK? What you recommend?

Hi,

No, 65MHz multiple by 3 is 195MHz divided by 1.02 = 191MHz, divide by 2 = 95.59MHz, outside the DCLK max frequency range.

Thanks

David 

Hi David, thanks i got your point. Can I choose lower value of frequency than 57.6MHz?

Any value which lie in the range of DCLK frequency range?