Hello,
We’ve been trying to nail down the root cause of a glitch we’ve noticed with our camera boards that use DS90UB913A/914A chipset. By the time digital video gets to the image processor, we seem to lose the last bit on a horizontal row. We came up with a reliable workaround when we first noticed this glitch a few years ago. But now we’re testing some alternative image sensors that have slightly different timing showing the same problem.
From scoping the signals, it looks like the Line Valid signal may not be getting sampled correctly relative to the Pixel Clock. Sometimes LV is good on leading edge of pixel clock, sometimes it’s on the falling edge. We’re not sure which is correct but it looks like our missing video bit is due to this LV/Pixel Clock timing.
Could you share any application notes or whitepapers that have more detail on the timing requirements of the 913A/914A?
Have you run across an issue like this in the past?
Thank you, Keith
