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DS90UB954-Q1: MIPI Link Settings

David Mckinney
Expert 6810 points
Part Number: DS90UB954-Q1

We have been doing testing over temperature and from our observations we think it is possible our MIPI link between the 954 and our ISP processor may be the problem.  As I lower the temperature, we appear to loose MIPI packets at the ISP input.  We have extensively looked at the soldering of the devices and we feel confident that the assembly is now not the issue.

Two questions:

  1. What are the recommended settings for four lane, 1.6 Gbps link speed interface?  Is periodic calibration recommended?
  2. Are registers 0x3B to 0x41 associated with the CSI interface?  Are there any undocumented adjustments we can do with any of these registers?
  • 0
    TI__Guru** 107560 points

    Hello David,

    1) We do not have recommended speed settings. This depends on your data rate and ISP input capability.

    Enabling or disabling the periodic calibration is dpeneding only on the ISP/SoC requirement. If this is desired by the processor, then it should be anabled otherwise not.

    2) These registers are about DVP mode, so it has nothing to do with the CSI Interface.

    Can you please provide a register dump from the 954 from a good case and from a bad case? So that I can review them and see if there is anything related to our device!