Part Number: TUSB2046B
Hello-
I've added a TUSB2046BIRHBR to a SoC design, but tied the reset pin to 3.3v. We have not been able to communicate with devices attached downstream and this seems to be the most likely culprit as it is the only significant deviation from the reference design. I've modified the prototype with a pullup resistor and manual switch to toggle the reset signal, but is there a better way to improvise the correct reset delay for testing? Would a supervisor/reset timer be recommended in the future?
Thanks