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DS90UB960-Q1: 960 LOCK is unstable

Amelie Zheng
Genius 10865 points
Part Number: DS90UB960-Q1

Hi Team.

My customer now use 953+960 together. The lock is unstable, sometimes high sometimes low.

I will ask customer to check the CLK whether it is ok.

At the same time, could you kindly help to check whether their configuration is ok? whether have problem based on this configuration?

         UB960_ID,0x01, 0x01},//Reset

         {UB960_ID,0x02, 0x3E},//GENERAL_CFG

         //{UB960_ID,0x0C, 0xAB},//RX_PORT_CTL

 

         {UB960_ID, 0x14,0x81}, // To configure GPIO0 to bring out Lock for Port0,

         //{UB960_ID, 0x15,0xA1}, // To configure GPIO0 to bring out pass for Port0,

 

         {UB960_ID,0x4C, 0x01},//FPD3_PORT_SEL  PORT0

         //{UB960_ID,0x4C,0x12}, //PORT1

         {UB960_ID,0x58, 0xDE},//BCC_CONFIG

         //{UB960_ID,0x58, 0xD8},//BCC_CONFIG

         {UB960_ID,0x5C, 0x80},//SER_ALIAS_ID

         {UB960_ID,0x5D, 0x32},//SlaveID[0]

         {UB960_ID,0x65, 0x90},//SlaveAlias[0]

         {UB960_ID,0x6D, 0x7C},//PORT_CONFIG

         {UB960_ID,0x70, 0x1E},

         {UB960_ID,0x6D, 0x7C},//PORT_CONFIG

        

         //{UB960_ID,0x33, 0x21},//CSI_CTL

         {UB960_ID,0x33, 0x01},//CSI_CTL

         //{UB960_ID,0x20, 0x00},//FWD_CTL1

         {UB960_ID,0x20, 0xE0},//FWD_CTL1

         {UB960_ID,0x21, 0x00},//FWD_CTL2

         //{UB960_ID,0x1F, 0x02},//CSI_PLL_CTL   修改

         {UB960_ID,0x1F, 0x00},//CSI_PLL_CTL  

         {UB960_ID,0xB9, 0x1F},//LINK_ERROR_COUNT        Len 15

 

         {UB960_ID,0x6E,0xAA}, // BC_GPIO_CTL0: FrameSync signal to GPIO0/1

         {UB960_ID,0x15,0x91}, // FrameSync signal; Device Status; Enabled

         {UB960_ID,0x19,0x15}, // FS_HIGH_TIME_1

         {UB960_ID,0x1A,0xB0}, // FS_HIGH_TIME_0

         {UB960_ID,0x1B,0xC3}, // FS_LOW_TIME_1

         {UB960_ID,0x1C,0x40}, // FS_LOW_TIME_0

         {UB960_ID,0x18,0x01}, // Enable FrameSync

 

         {UB953_ALIAS_ID,0x02, 0x13},//General_CFG

         {UB953_ALIAS_ID,0x0E, 0x1E},//GPIO_INPUT_CTRL

         {UB953_ALIAS_ID,0x0D, 0x01},//LOCAL_GPIO_DATA

  • 0
    TI__Mastermind 28240 points

    Hi Amelie,

    There are a number of reasons why the LOCK might be unstable. But these are mostly related to the physical connections/layout of your board. Check to see if the Power-Up Sequence is followed and if the power supplies applied to the 953 and 960 are stable. Also, check to see if the PDB pin on both ICs have the correct RC circuit. You need a 10-kOhm pull-up resistor to 1.8V and a >10uF capacitor to GND. And if a PoC circuit is used, make sure it matches the 4G circuit listed in the datasheet.

    Here are also some comments on your register settings, after a quick look:

    1. I see that you are using GPIO0 to bring out Lock for Port0. Is there a LOCK issue with only Port0? Are there any other connected Rx ports that have similar LOCK issues?
    2. In this line, {UB960_ID,0x20, 0xE0},//FWD_CTL1, it seems you are disabling forwarding from Port0. Register can be set to the default value of 0xF0.
    3. In this line,  {UB960_ID,0x21, 0x00},//FWD_CTL2, you are disabling all forwarding modes. You need to select one. By default, Round Robin forwarding mode is used.

    Is there a specific register setting that you are suspicious of and would like me to take a closer look?

    Best,

    Justin Phan