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DS90UB941AS-Q1: CRC and LINK_ERROR

Part Number: DS90UB941AS-Q1

Dear Expert,

In my system (941+948+screen) , everything works fine.

However, register 0xA and 0xB(CRC_ERROR) of 941 keeps increasing . Bit 1 of  0xC register "DES_ERROR" is also set.  This happen with all boards.

1. Does it indicate physical link problem? But why my Screen is still very stable and clean. And no any LINK_LOST reported.

2. Why there is only CRC register for back channel but no CRC register for forward channel check?

3. In 948 0x41 register, does LINK_ERROR_COUNT base on CRC or  clock unlock? How to understand below claim: "Counter is pixel clock based. clk0, clk1 and DCA are monitored for link errors"

 And 0x41 bit 3..0 is "Link error count threshold", then where to check current "Link error count"?

Looking forward for your help

  • Hello,

    This could possibly mean a physical link problem. The DES_ERROR bit does not clear until link is lost or you manually clear it. So considering your display is fine, it may be that the issue corrected itself and the bit was never cleared.

    There is only  a CRC register for backchannel because CRC is only a function of the backchannel. So CRC counter can only be found on the SER.

    Link errors are monitored as data is received by the DES, so this is based on the pixel clock. The data points listed "clk0, clk1, and DCA" are sent along with RGB data, and when there is an anomaly from any of these, a link error is flagged. There is no way to view the current count of link errors, however you can set the link error threshold so the device will lose lock when the threshold of link errors is reached.

    Running BIST will help determine the strength of the link between your devices, and help you to see any issues that may exist. When using BIST mode, you can check register 0x25 on the 948 for forward channel errors.

    Regards,

    Ben

  • Ben,

    Great thanks for explanation