DS125DF410EVM: Request the schematic and PCB Layout(BRD file)

Jinchang Nam

Part Number: DS125DF410EVM
Other Parts Discussed in Thread: DS125DF410

We are going to have a test about 10GbE compliance test.

1. Please provide how to generate PRBS pattern(31, 9, Square8(8180))

2. Please provide the schematic and PCB Layout(BRD).

Best Regards,

Jin

0 Nasser Mohammadi over 4 years ago

Greetings,

1). For PRBS generation, please use the following settings:

Settings below uses VCO free run:

For DS125DF410, with the setting below, it will produce a frequency of 11.2G.

Please note the frequency setting is very course it may not be possible to get exact frequency.

Also the frequency will vary with PVT, so need to adjust the reg_0x08 to tune the frequency.

The DS125DF410 VCO can go up to 12.8G. The CAP DAC setting (reg_0x08) must be set to 0x00’h to get max frequency.

0xFF 0x04 //Sel Channel 0. If want to write to all channel registers, then change the value to 0x0C

0x14 0x80 //SD Preset Enable

0x09 0xEC //Override charge pump power down, divider select, VCO cap count, LPF DAC, loopthru mux select

0x1B 0x00 //Disable both charge pumps

0x08 0x07 //Set VCO cap count to 07

0x18 0x00 //Set divider to 1

0x1F 0x52 //Set LPF DAC to 12

0x1E 0x91 //Output Mux Select PRBS, enable PRBS Generator

0x0D 0x20 //Enable PRBS Clock

0x30 0x00 //Reset PRBS CLK

0x30 0x0A //Powerup PRBS Clk, select PRBS31

2). Please attached note EVM collaterals.

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